T 0822/97 (Amorphous silicon/QINETIQ) of 26.2.2002

Summary of Facts and Submissions

I. European patent application No. 91 920 076.6 was refused in a decision of the examining division dated 27. February 1997. The ground for the refusal was that the subject matter of claims 1 to 16 did not involve an inventive step having regard to the prior art documents

D1: Patent Abstracts of Japan, vol. 8, no. 272, (E-284) [1709] 13 December 1984 & JP-A-59 144 149;

D2: EP-A-0 312 466;

D3: Journal of Applied Physics, vol. 58, no. 2, July 1985, pages 683 to 687; and

D4: Nuclear Instruments and Methods in Physics Research, Section B, vol. 19/20, February 1987, pages 307 to 311.

II. The reasoning of the examining division in the decision under appeal can be summarized as follows:

(a) Claim 1 under consideration only defines the step for forming amorphous silicon on porous silicon, as a precursor to forming silicon-on-silicon oxide structures, since it merely comprises the steps (i) and (ii) recited in claim 1.

(b) Document D1 discloses a method of forming single crystal silicon on porous silicon comprising the steps of forming a porous silicon layer on a silicon wafer and converting part of the porous silicon into (non-porous) single crystal silicon by annealing the porous silicon layer with a laser beam "or the like".

(c) The method of claim 1 differs from that of document D1 in that the parts of the porous silicon which are to be converted into non-porous, single crystal silicon, are made amorphous using ion implantation prior to annealing. Therefore, the objective problem was seen in the desire to improve the efficiently of the annealing step by pre-treating the porous silicon material.

(d) Document D2 which is also concerned with a method of forming an SOI structure where a porous silicon layer is recrystallized, discloses amorphization of the porous silicon layer by ion implantation prior to annealing in order to promote the recrystallization. Thus, a skilled person concerned with improving the method of document D1 would readily consider replacing the single step laser anneal process by the two-step suggested in document D2 and hence arrive at the claimed method.

III. The appellant (applicant) lodged an appeal on 1 May 1997, paying the appeal fee on 2 May 1997. A statement of the grounds of appeal was filed on 4 July 1997 together with an English translation of document D2 and the following new documents:

D5: J. M. KEEN et al. "Tracking Implants in Porous Silicon with Marker Layers" presented at 1992 Fall Meeting of the Electrochemical Society, Toronto, CA;

D6: Applied Surface Science, vol. 41/42, November 1989, pages 604 to 613; and

D7: J. M. KEEN et al. "Ion Beam Modifications of Porous silicon" presented at the 1992 Fall Meeting of the Electrochemical Society, Toronto, CA.

Documents D5 and D7 are published after the filing date of the application in suit.

IV. In a communication under Article 11(2) of the Rules of Procedure of the Boards of Appeal, the Board raised the objection of lack of novelty having regard to document D2. In response to this communication and to a telephone consultation dated 12 December 2001, the appellant filed new claims and amended description pages with the letters dated 23 November 2001, 10. December 2001, and 13 December 2001.

The appellant requests that the decision under appeal be set aside and a patent be granted on the basis of one of the following requests:

Main request:

Claims:

claims 1 to 6 filed with the letter dated 13 December 2001;

claims 7 to 16 according to the mainrequest filed with the letter dated 10 December 2001

Description:

pages 3, 4 filed with the letter dated 13 December 2001;

pages 1, 2, 6 to 12 as originally filed;

page 5 filed with the letter dated 1 December 1994

Drawings:

Sheets 1/4 to 4/4 as originally filed.

First auxiliary request:

Claims:

1. to 16 according to Auxiliary Request 1' filed with the letter dated 10 December 2001

Description and Drawings as for the main request

Second auxiliary request:

Claims:

1. to 16 according to Auxiliary Request 2 filed with the letter dated 23 November 2001

Description and Drawings as for the main request.

The appellant furthermore requests reimbursement of the appal fee, and oral proceedings in case the Board intended to reject the application.

V. Claim 1 according to appellant's main request reads as follows:

"1. A method of producing amorphous silicon on porous silicon material comprising the steps of:

(i) manufacturing a porous silicon layer on a silicon wafer, such that the silicon wafer has a porous silicon surface and a non-porous silicon surface, and

(ii) applying an implanted ion dose to at least a portion of the porous silicon surface at incidence angles that minimize channeling of the ions down pores or major crystallographic axes such that the dose is sufficient to cause amorphization of porous silicon to produce an amorphous silicon region."

Claims 2 to 16 are dependent claims.

VI. The appellant presented essentially the following arguments in support of his requests:

(a) The appellant does not agree with the position of the examining division that the application in suit concerns the formation of silicon-on-porous-silicon as a precursor for forming silicon-on-silicon-oxide structures, since the steps (i) and (ii) of claim 1 May be followed by e.g. metalllization of the porous silicon, as disclosed in the application as file (cf. page 7, second paragraph). Thus, the examining division has incorrectly identified the objective problem underlying the difference between the method of claim 1 and that of document D1, since no annealing step is required to perform the method of claim 1.

(b) By ion implanting at a slant angle, it is possible to convert only the top layer of the porous silicon layer to an amorphous layer. Document D2 does not give any details at all how the ion-implantation should be carried out, and does not indicate that ion-implantation would result in a non-porous amorphous sample.

Reference is made to documents D5 and D7 to show that the properties of ion implantation of porous silicon, in particular controlling the implantation depth, is quite different from that of non-porous, crystalline silicon.

(c) The appellant requests reimbursement of the appeals fee, since the examining division had stated in the decision under appeal that claim 1 was not limited to the two steps (i) and (ii). The appellant argues that the position that claim 1 merely concerns part of the desired process of forming single crystal silicon on porous silicon violates the provisions of Article 84 EPC. Therefore, the appellant request reimbursement of the appeal fee.

Reasons for the Decision

1. The appeal complies with Articles 106 to 108 and Rule 64 EPC and is therefore admissible.

2. Amendments and clarity

2.1. Present claim 1 is based on claims 1 and 10 as filed together with the feature disclosed on page 4, last paragraph, first sentence of the application as filed, and has been amended for clarity. Claims 2 to 16 are based on claims 3 to 17 and 19 as filed, respectively.

The Board is therefore satisfied that the requirements of Articles 84 and 123(2) EPC are met.

3. Novelty

3.1. The application relates to a method of producing amorphous silicon on porous silicon. Such a structure can be used for e.g. pyroelectric devices, or the amorphous-porous silicon structure can be processed further into e.g. silicon on insulator (SOI) structures. The amorphous silicon layer is formed by ion implantation of a surface portion of porous silicon. In case when an SOI structure is to be produced, the amorphous layer can be recrystallized into a non-porous monocrystalline silicon layer by annealing the structure.

3.2. Document D1 discloses a method of forming a silicon on insulator structure (SOI) where a porous silicon layer is formed on a silicon wafer. A non-porous crystalline silicon layer is selectively formed in the porous layer using laser annealing. The remaining porous layer is subsequently oxidized.

Although the abstract of document D1 suggests that laser "or the like" may be employed for the annealing step, the only means for annealing disclosed in document D1 employs a laser beam.

3.2.1. The method of claim 1 differs from that of document D1 in that a step of ion implanting the porous layer is carried out in order to produce an amorphous silicon layer, whereas in the method of document D1, no pre-treatment of the porous layer is carried out prior to the laser annealing.

3.3. Document D2 discloses a process of forming an SOI structure. After a porous layer is formed on a wafer, the interface between the wafer and the porous is oxidized using an anodic oxidation process. The remaining porous layer is then recrystallized by annealing. In order to ameliorate the recrystallization, it is suggested either to deposit an amorphous layer on the porous layer, or to ion implant the porous layer to form an amorphous layer on the surface portion (cf. column 3, lines 53 to 60).

3.3.1. The method of claim 1 differs from that of document D2 in that the ion implantation is carried out at incidence angles that minimize channeling of the ions down pores or major crystallographic axes such that the ion implantation dose is sufficient to cause amorphization of porous silicon to produce an amorphous silicon region. Document D2, on the other hand, does not disclose any details as to how the ion implantation should be carried out in order to form an amorphous layer on the porous silicon layer.

3.4. Documents D3 and D4 disclose amorphization of silicon using ion implantation (cf. the abstracts). The ion implantation is carried out into bulk silicon and not porous silicon. Document D6, cited by the appellant, describes the oxidation of porous silicon for forming SOI structures using the same anodic oxidation process as disclosed in document D2.

Documents D5 and D7, which were cited by the appellant, are published after the filing date of the application in suit, and therefore do not belong to the state of the art.

3.5. Thus the method of producing amorphous silicon on porous silicon as defined in claim 1 is new within the meaning of Article 54 EPC.

4. Inventive step

4.1. Document D2 is considered the closest prior art, since it discloses a method of forming amorphous silicon on porous silicon.

In view of the differences stated above between the method of claim 1 and that of document D2, the application in suit relates to the problem of converting a portion of a porous silicon layer to amorphous silicon layer using ion implantation.

4.2. The appellant argued that ion implantation of porous silicon is more unpredictable than that of non-porous silicon. In particular the implantation depth is more difficult to control and predict due to the presence of large pores along which the ions may be channeled. Such ion channeling has to be avoided when only an upper portion of a porous layer is to be implanted. Therefore, the claimed process specifies that the incidence angles of the ion implantation should be chosen to minimize channeling of the ions down pores or major crystallographic axes. The Board is convinced by these arguments, since documents D5 and D7 cited by the appellant provide the evidence regarding the effect of channeling (cf. D5, Figures 1 to 3; D7, Figure 3). As shown in Figure 1 of document D5, the channeling of ions in porous silicon causes a significant increase in implantation depth, as well as a broadening of the distribution of the implanted ions, when compared to ion implantation in bulk silicon.

Since neither document D2 nor the other available prior art documents disclose any details relating to ion implantation of porous silicon, the control of the channeling of ions by controlling the angle of incidence as set out in claim 1 so as to convert a position of the porous layer into an amorphous layer is not suggested by the prior art.

Therefore, in the Board's judgement, the subject matter of claim 1 involves an inventive step within the meaning of Article 56 EPC.

5. Reimbursement of the appeal fee

The appellant has requested reimbursement of the appeal fee for the reason that the examining division committed an error when determining the scope of the claims (cf. item VI(a) and (c) above).

Under Rule 67 EPC, a reimbursement of the appeal fee can only take place when the appeal is allowable, and a reimbursement is equitable by reason of a substantial procedural violation. In the present case, the reason for the request for reimbursement of the appeal fee is an alleged error in determining the scope of the claims. In other words, the examining division is alleged to have committed an error of judgment. According to the case law of the boards of appeal, however, an alleged error of judgement normally is not to be regarded as a substantial procedural violation (see "Case Law of the Boards of Appeal of the EPO", 3rd Edition 1998, section VII-D-15.4.5, pages 516 and 517).

Furthermore, the Board is of the opinion that the examining division did not commit an error of judgment in this respect. The examining division argued that claim 1 was not limited to the two steps (i) and (ii) defined therein for the reason that the method of claim 1 comprises the steps (i) and (ii). This is consistent with the established practice in the EPO of interpreting the term "comprising" to mean "including", "containing" or "comprehending" (cf. Guidelines, V-III, 4.13).

The appellant's request for reimbursement of the appeal fee is therefore not well-founded and is accordingly rejected.

ORDER

For these reasons it is decided that:

1. The decision under appeal is set aside.

2. The case is remitted to the department of the first instance with the order to grant a patent on the basis of the documents according to the main request as specified under item IV above.

3. The request for reimbursement of the appeal fee is rejected.