T 0411/97 () of 12.9.2000

Summary of Facts and Submissions

I. This appeal lies from the decision of the opposition division dated 24 March 1997 rejecting the opposition against European Patent No. 0 484 232.

II. The patent was opposed by the appellant (opponent) on the ground of lack of inventive step (Article 100(a) together with 52(1) and 56 EPC) with respect to, inter alia, the following prior art documents:

D1: 2nd Workshop on High-Temperature Superconducting Electron Device, Shikabe (JP) 7 to 9 June 1989, pages 393 to 397;

D3: Patent Abstracts of Japan, vol. 14, No. 467, 11. October 1990 & JP-A-2-192 172; and

D4: 5th International Workshop on Future Electron Devices - High-Temperature Superconducting Electron Devices, Miyagi-Zao (JP) 2 to 4 June 1988, pages 313 to 321.

The following document was cited by the respondent during the opposition proceedings:

D7: IEEE Transaction on Magnetics, vol. MAG-21, No. 2, March 1985, pages 709 to 716.

III. The appellant filed the notice of appeal on 11 April 1997, paying the appeal fee the same day. The statement of the grounds of appeal was filed on 16 July 1997 together with the following prior art documents:

D8: C. P. Parsch, "Supraleiter und supraleitende Magnete" (Siemens AG, Berlin and Munich, 1975), pages 29 to 30;

D9: DE-A-38 15 183; and

D10: EP-A-0 354 804.

IV. In response, the respondent filed the following documents in support of his submission that the subject matter of claim 1 involved an inventive step:

D11: EPRI Report on Energy Applications of High-Temperature Superconductivity, Volume 1, Electric Power Research Institute, Palo Alto (US), February 1990, pages 25 to 33; and

D12: EPRI Report on Energy Applications of High-Temperature Superconductivity, Volume 2, Electric Power Research Institute, Palo Alto (US), 1990, pages 1 to 15.

V. In response to a communication of the Board annexed to summons to oral proceedings, the appellant filed the prior art documents

D13: 2nd workshop on High-Temperature Superconducting Electron Device, Shikabe (JP) 7 to 9 June 1989, pages 281 to 284; and

D14: IEEE Transactions on Magnetics, vol. 25, No. 2, March 1989, pages 927 to 930.

VI. At the oral proceedings held on 12 September 2000, the appellant submitted a translation of document D3 (JP-A-2 192 172) in German (in the following referred to as document D3a).

VII. The appellant requested that the decision under appeal be set aside and that the European patent No. 0 484 232 be revoked.

The responded submitted new claims at the oral proceedings and requested that the decision under appeal be set aside and the patent be maintained on the basis of:

Claims: Nos.1 to 13 filed during the oral proceedings; Description: column 1, line 1 to column 3, lines 16 and column 3, line 36 to column 12, line 10 of the European patent specification EP 0 484 232 B1;

Page A filed during the oral proceedings replacing column 3, lines 17 to 35 of the patent specification EP 0 484 232 B1;

Drawings: Figures 1A to 1I and 2A to 2I of the patent specification EP-484 232 B1.

VIII. The independent claims 1 and 11 under consideration read as follows:

"1. A superconducting device comprising a substrate (5) a superconducting channel (10) having first and second opposite faces, and constituted of a first oxide superconductor thin film (1) formed to have an angle relative to a deposition surface (5A) of said substrate, a superconductor source electrode (2) and a superconductor drain electrode(3) formed on said first face, and at opposite ends of said superconducting channel, so that a superconducting current can flow through said superconducting channel between said superconductor source electrode and said superconductor drain electrode, and a gate electrode (11) in the form of a sheet having an end abutted against a gate insulator (6) at said second face of said superconducting channel so as to control the superconducting current flowing through said superconducting channel, said gate electrode being formed of a second oxide superconductor thin film (11) in parallel to said deposition surface of said substrate, so that the thickness of the oxide superconductor thin film determines the gate length, and wherein said second oxide superconductor thin film forming said gate electrode is between a first insulating layer (7) formed on said deposition surface of said substrate, and an overlying second insulating layer (8) so as to form a stacked structure having an end surface having said angle relative to said deposition surface of said substrate."

"11. A method of manufacturing a superconducting device, comprising the step of forming and stacking a first oxide superconducting thin film (11) and a first insulating layer (8) on an insulating surface (5A, 7) of a substrate (5) in the named order, partially removing said stacked structure of said first oxide superconducting thin film and said first insulating layer so as to have a smooth continuous end surface having an angle to said insulating surface of said substrate and extending from said first insulating layer at least to the bottom surface of said first oxide superconducting thin film, and forming and stacking a second insulating layer (6) and a second oxide superconducting thin film (1) in the named order on said end surface of said stacked structure of said first oxide superconducting thin film and said first insulating layer, so that said first oxide superconducting thin film functions as a gate electrode (11) and said second insulating layer functions as a gate insulator (6) and so that a first portion of said second oxide superconducting thin film joining to said end surface of said first oxide superconducting film through said second insulating layer forms a superconducting channel (10), and second and third portions of said second oxide superconducting thin film at both sides of said first portion of said second oxide superconducting thin film form a source (2) and a drain (3), respectively."

IX. The appellant made essentially the following arguments in support of his requests:

(a) Starting from document D1, the technical problem relates to finding an alternative to the injection-type gate structure in the device of document D1 and using an oxide superconducting material for the channel region.

As is evident from document D7, a review article on different types of superconducting devices, three-terminal superconducting devices for controlling a superconducting current are well-known in the art. A skilled person would therefore routinely consider these devices for controlling a superconducting current.

(b) Document D10 discloses a field-effect transistor having an insulating gate structure formed over a channel region made of an oxide superconducting thin film (cf. Figure 5; column 7, lines 21 to 27). Since the device of document D10 is described as an improvement over devices utilizing Josephson effect or the proximity effect and is described to be fast (cf. column 3, lines 23 to 30; column 7, lines 47 to 56), the skilled person would have an incentive to use the teaching of document D10 to improve the device of document D1. Since document D13 teaches a gate length on the nanometer scale for the same type of device as that of document D10 (cf. D13, page 283, second paragraph), the skilled person would retain the channel structure of the device of document D1 which allows very small gate lengths (cf. D1, page 394, last paragraph).

(c) Alternatively, a combination of the teaching of document D1 with that of document D9 leads to the claimed subject matter in an obvious manner, since document D9 discloses a field effect transistor operating with a magnetic field and having a channel made of an oxide superconducting thin film formed at an angle to the deposition surface of the substrate (cf. the Figure and accompanying text; column 6, lines 21 to 22; column 5, lines 39 to 49), as claimed in claim 1 of the patent in suit.

(d) Furthermore, starting from document D3 instead of document D1, a skilled person faced with the task of improving the device known from document D3 would arrive at the claimed subject matter in an obvious manner when taking the teaching of document D10 into consideration: Document D3 discloses a superconducting transistor operating according to the proximity effect where a channel made of a semiconductor material between superconducting source and drain regions is at right angle to the deposition surface of the substrate and an insulating gate made of an oxide superconductor is provided over the channel (cf. D3, abstract; D3a, page 5, penultimate paragraph). Since document D10 discusses advantages of the device described therein with respect to devices operating according to the proximity effect, there is a clear incentive for the skilled person to combine the teaching of the documents. As the structure of the channel in the device of document D3 enables to reduce the distance between the source and drain, which in turn is known to improve the speed of the device, the skilled person would retain this structure.

(e) New claims submitted during the oral proceedings are not filed within the time limit prescribed in the official communication annexed to the summons to the oral proceedings, and should therefore not be admitted into the proceedings.

X. The respondent essentially argued as follows:

(a) Since the devices of documents D1 and D10 operate according to entirely different physical principles, the skilled person would not consider a combination of these devices. Furthermore, document D10 discloses a planar device and does not discuss the effect of gate length on the speed of the device. Therefore, the skilled person would see no reason to employ a complicated, non-planar structure of the type disclosed in document D1 for the device of document D10.

(b) Whereas the current in the device of document D1 is controlled by injection of quasi particles, the control of the current in the device of document D9 is controlled by an applied magnetic field. Thus, the two devices not only operate according to two different physical phenomena, but are also not field effect devices where the channel current is controlled by an electric field, as in the device of the patent in suit. Thus, a device resulting from a combination of documents D1 and D9 would not result in the claimed invention.

(c) As to a combination of the documents D3 and D10, such a combination would not have all the features of the claimed device: The gate electrode of the device of document D3 is, in contrast to the claimed device, abutting the same face of the channel layer as the source and drain electrodes. Furthermore, the gate electrode of the device of document D3 is overlapping the source and drain electrodes, so that the gate length is not determined by the thickness of the gate electrode layer but by the source-drain distance.

Reasons for the Decision

1. The appeal meets the requirements of Articles 106 to 108 and Rule 64 EPC, and is therefore admissible.

2.1. Late filed documents - admissibility

As stated in paragraphs III and V above, documents D8 to D10, D13 and D14 were cited by the appellant for first time in the appeal proceedings, so that they are outside the opposition period as laid down in Article 99(1) EPC in conjunction with Rule 55(c) EPC. In the Board's view, there was no proper justification for the late-filing of these documents, since the claims forming the basis of the decision were not amended during the opposition proceedings, so that the new documents were not in response to amendments to claims, and the new documents do not purport to rebut the findings in the decision under appeal, for example, by way of filling-in gaps in the appellant's case before the opposition division. Therefore, the question, which is to be decided at the outset, is whether the Board, in the exercise of its discretion under Article 114(2) EPC, should disregard these late-filed documents as not filed in due time. According to decision T 1002/92 (OJ EPO 1995, 605) (cf. also T 389/95, not published in the Official Journal), which considered the impact of the opinion of the Enlarged Board of Appeal in G 10/91 (OJ EPO 1993, 420) on the admissibility of late-filed evidence, a decisive criterion for the admissibility of the late-filed evidence at the appeal stage is whether the late-filed evidence is prima-facie highly relevant in the sense that it is highly likely to prejudice the maintenance of the patent.

Applying the above criterion in the present case, only documents D9, D10, and D13 are prima-facie highly relevant, since they would have prejudiced the maintenance of the patent in the unamended form. These documents are accordingly introduced into the proceedings, and the remaining late-filed documents are disregarded in accordance with Article 114(2) EPC.

2.2. Late filed request - admissibility

As to the admissibility of the new claims forming the respondent's request submitted at the beginning of the oral proceedings, the Board notes that this was in fact caused by the late-filing of the new evidence by the appellant during the appeal proceedings. Moreover, as will be apparent from the following, the amendments to the claims are such that they clearly meet the formal requirements, i.e. the requirements of Article 84 and Article 123(2) and (3) of the EPC. The Board therefore sees no reason to disregard the late-filed request.

3. Amendments

Claim 1 contains the features of claims 1 and 2 as filed with the additional specification that the gate electrode is abutted against the opposite face of the superconducting channel to that where the source and drain electrodes are formed, and that the thickness of the oxide superconductor thin film determines the gate length. These features are disclosed in Figures 1I and 2I and in page 6, lines 20 to 27 of the application as filed, respectively. Claims 2 to 13 correspond to claims 3 to 14 of the application as filed.

Therefore, the claims meet the requirements of Article 123(2) EPC.

Since claims 1 to 14 as granted correspond to claims 1 to 14 of the application as filed, it follows from the above that the requirements of Article 123(3) EPC are also met.

4. Inventive step

The only issue in the present appeal is that of inventive step.

4.1. At the oral proceedings, only documents D1, D3, D4, D7, D9, D10, and D13 were relied upon by the parties in the consideration of inventive step. In the following therefore, only these documents are taken into consideration.

4.2. The patent in suit concerns a superconducting device having a channel layer formed of an oxide superconductor layer and a gate electrode made of an oxide superconductor separated from the channel layer by a gate insulator layer, i.e. the current in the channel is controlled by subjecting the channel to an electric field induced by applying a voltage to the gate electrode in a manner analogous to a semiconductor MOSFET device. As described in the patent specification, an extremely short channel length is desired in order to obtain high switching speed of the superconducting device (cf. column 2, lines 48 to 53). In the claimed device and method, the channel layer is at an angle with respect to the substrate surface and the gate length is determined by the thickness of the gate electrode layer. As the thickness of the gate electrode layer can be controlled precisely during its formation, e.g. by deposition, the claimed structure of the device enables gate lengths of the order of 0.1 m without having to resort to fine-processing techniques (cf. column 4, lines 24 to 34).

4.3. It was not in dispute that document D1 represents the closest prior art. Document D1 discloses a superconducting device operating according to the principle of quasi particle injection, i.e. a tunnel current injected into a superconducting channel from a superconducting gate electrode via a tunnel barrier causes a superconducting to normal-conducting phase transition in the channel layer. The device of document D1 comprises a superconducting channel layer made of a NbN thin film formed to have an angle relative to a deposition surface of a substrate (cf. D1, Figure 1). Source and drain electrodes made of Cu are formed at opposite ends on the upper face of the channel layer and a gate electrode (called "injector" in document D1) is formed of Nb and abuts against a tunnel barrier layer at the lower face of the channel layer.

4.3.1. The device of claim 1 differs from that of document D1 firstly in that the claimed device works through electric field effect, i.e. the number of charged carriers is depleted by subjecting the channel layer to an electric field, whereas the device of document D1 works through the principle of inducing a superconducting to normal phase transition in the channel by injecting a tunnel current into the channel. Secondly, the claimed device specifies oxide superconductors whereas in document D1 "classic" superconducting materials are used. Finally, a portion of the Nb gate electrode at one end overlaps the source/drain copper electrode and the gate electrode does not extend the entire length of the NbN channel layer. Thus, it is apparent that the thickness of the Nb gate electrode does not determine the gate length (cf. Figure 1).

4.4. In view of these differences, the technical problem addressed by the invention as claimed can be seen to provide a FET type superconducting device having a structure which enables to provide a short superconducting channel made of an oxide superconducting layer (cf. also column 2, line 57 to column 3, line 16 of the patent in suit).

4.5. Documents D4, D7, D10, and D13 all disclose a superconducting device of the same type as that of the patent in suit, i.e. a device having a channel made of an oxide superconductor thin film and an insulated gate electrode overlying the channel.(cf. D4, Section "High-Tc SFETs" on pages 315 to 316; D7, Section "Field-Induced Effects on Superconductors" on page 711; D10, abstract; D13, page 281, last paragraph, Figure 2).

4.5.1. In document D4, it was estimated that the electric field strength had to be in the range of 107 and 108 V/cm in order to induce a noticeable change of the carrier concentration in the superconducting channel layer. Since such high electric fields were considered to be outside the range of the technology at the publication date of document D4 (cf. D4, page 316, second paragraph), document D4 concentrates on describing other types of superconducting devices (cf. D4, Figures 1 and 8; Sections "FET-like Devices" and "High-Tc SFETs" on pages 313 to 314 and 315 to 316, respectively).

4.5.2. In document D10, it is taught that the superconducting channel has to be very thin (about 2.5 nm) in order to allow proper switching at high speed (about 30 ns) (cf. D7, column 3, lines 23 to 30; column 4, lines 16 to 25; column 5, lines 13 to 15; column 7, lines 21 to 27 and 48. to 56). Oxide superconductor materials, such as YBaCuO, are considered suitable for such thin films (cf. D7, column 8, lines 11 to 17).

4.5.3. Document D13 similarly discusses the importance of keeping the channel layer thin due to the screening effects (cf. D13, page 282, first paragraph). Due to the low density of states of carriers in oxide superconductors, these materials are considered suitable for the channel layer. In addition, it is noted that the projected performance of field-effect devices improves greatly as the gate length is reduced to the nanometer scale (cf. D13, page 283, second paragraph). As a means to form a gate electrode with such dimensions, it is suggested to use electron beam lithography and to form the superconducting device on a thin membrane (cf. D13, Figure 3).

4.5.4. In summary therefore, none of the documents D4, D7, D10 and D13 discloses a channel at an angle with respect to the substrate deposition surface, as the case is in the claimed device.

4.6. In this connection, the appellant submitted that a skilled person faced with the above technical problem would consider combining the teaching of document D1 with that of document D10. The Board however, does not agree with the appellant since the devices of documents D1 and D10 operate according to entirely different principles, the skilled person would not consider such a combination. Thus, the device of document D1 operates by injecting quasi particles through a tunnel barrier from the gate electrode into the superconducting channel to trigger a phase transition in the channel layer, the device described in document D10, as well as those in documents D4, D7, and D13, relate to field effect devices where no significant tunneling of carriers takes place across the gate insulating layer.

4.6.1. Moreover, it appears from document D1 that the purpose of using a construction where the channel layer has an angle with respect to the substrate surface is to form the channel (called "link" in document D1) as short as possible (cf. page 394, last paragraph), since the small dimensions of the channel layer were believed to improve the switching speed of the device. The particular choice of NbN (not an oxide superconductor) for the channel layer is also described as an important factor for enhancing the switching speed, since NbN combines the properties of having a high critical superconducting current and a high resistivity in its normal state. The effective length of the gate electrode ("injector"), however, does not appear to be given any particular importance in document D1.

In documents D4, D7, D10, and D13, on the other hand, the main focus is on the difficulties associated with producing a superconducting channel layer that can be controlled by field effect. These problems are, in particular, related to finding superconducting materials with sufficiently low density of states to be controllable by applying an electric field, and growing sufficiently thin superconducting layers having such low density of states, and finally finding materials for the gate insulating layer which can withstand very high electric fields required in these type of devices (cf. points 4.5 to 4.5.3 above).

From the above, it is apparent that the technical considerations underlying the design of the device structure disclosed in document D1 are different from those disclosed in documents D4, D7, D10, and D13.

4.6.2. Finally, the gate electrode of the device of document D1 partially overlaps one source/drain electrode ("bank") which has the consequence that the thickness of the gate electrode does not determine the gate length. Thus, even if one would contemplate combining the features of the device of document D1 with those of the device disclosed in any of the documents D4, D7, D10, and D13, such a combination would still fail to have all the features of claim 1.

Thus, for the above reasons, the Board finds that the skilled person seeking to improve the device of document D1 would not consider any documents relating to superconducting field effect devices to be relevant to this end.

4.7. The appellant also submitted that the skilled person would arrive at the claimed subject matter in an obvious manner by combining the teaching of document D1 with that of document D9. Such a combination would, in the Board's opinion, be even more unlikely, since not only do the two devices operate according to different principles, but also, neither device is a field effect device: Whereas the device of D1 is a tunnel injection device where a tunnel current is injected into the superconducting channel, the current in the channel layer of the device of document D9 is controlled by subjecting the channel layer 3 to a magnetic field H induced by a control current Is flowing through a conducting line 20 perpendicular to the channel layer (cf. D9, column 5, lines 39 to 52). Therefore, contrary to the submission of the appellant, the device of document D9 cannot be regarded as a "field effect device", since the term "field effect device" is in the technical field of electronic devices --regardless whether they are based on superconductor or semiconductor technology-- reserved for devices where the conductivity in the channel is controlled by an applied electric field.

4.8. During the oral proceedings, the appellant also submitted that document D3 could equally be considered as the closest prior art, and that it would be obvious to a skilled person to combine the teaching of document D3 with that of document D10 to arrive at the claimed device.

4.8.1. Document D3 relates to a so-called SFET, i.e. a superconducting device where superconducting source and drain electrodes are separated by a semiconductor channel where the distance between the source and drain is small enough that superconductivity is induced in the channel through a phenomenon known as the "proximity effect". The device of document D3 comprises a channel layer formed in a step 5 perpendicular to the main surface of a semiconductor substrate 2, source and drain electrodes 3, 4 formed above and below the step, a gate insulating layer 7 formed on the channel, and a gate electrode 7 formed on the step. The current through the channel is controlled by an insulated gate, i.e. field effect. The purpose of placing the channel along the step is to adjust accurately the small distance between the source and drain (cf. D3a, page 3, first paragraph). The gate electrode can be made of aluminum or of a superconducting layer. As superconductor material for the channel layer and gate electrode, oxide superconductors, such as BiSrCaCuO is suggested (cf. D3a, page 5, penultimate paragraph).

4.8.2. The device of claim 1 differs from that of document D3 not only in that the channel is made of a superconducting layer instead of a semiconductor, but also in that the gate electrode is abutting the opposite face of the channel layer to that contacted by the source and drain electrodes, whereas in the device of document D3, the gate electrode is abutting the same face of the channel layer as the source and drain electrodes. Moreover, as the gate electrode in the device of document D3 is overlapping the source and drain electrodes, the gate length of the device is not determined by the physical size of the gate electrode, but by the source-drain distance.

4.8.3. Thus, although the device of document D10 is described therein to have advantages over devices working according to the proximity effect, such as the device of document D3, the resulting device from such a combination of documents D3 and D10 would neither have the gate length determined by the thickness of the gate electrode layer, nor would the gate electrode be on the opposite face of the channel layer to that of the source and drain electrodes. The Board also does not see any indication that the modifications of the above-mentioned features required for arriving at the claimed subject matter could be carried out by the skilled person in a routine manner.

4.10. Therefore, in the Board's judgement, the subject matter of claim 1 involves an inventive step within the meaning of Article 56 EPC.

4.11. Since the method of independent claim 12 results in a device having the same features as that of claim 1, the subject matter of claim 12 involves an inventive step for the reasons given above in respect of claim 1. The patent in suit therefore meets the requirements of Article 52(1) EPC.

ORDER

For these reasons it is decided that:

1. The decision under appeal is set aside.

2. The case is remitted to the first instance with the order to maintain the patent on the basis of the patentee's request stated under item VII above.