T 0126/96 () of 16.9.1999

Summary of Facts and Submissions

I. European patent No. 0 221 454 was granted on 26 August 1992 on the basis of European patent application No. 86 114 697.5

II. The granted patent was opposed by the respondent (opponent) on the grounds that its subject matter lacked inventive step with respect to the state of the art (Article 100(a) EPC).

III. With its decision posted on 29 November 1995 the Opposition held that the claimed subject matter did not involve an inventive step and revoked the patent.

IV. On 29 January 1996 the appellants (patentees) lodged an appeal against the decision of the Opposition Division. The notice of appeal was followed by the statement of grounds submitted with letter of 25 March 1996.

Of the six pre-published documents cited during the opposition proceedings only documents:

E1: FR-A-2 469 259

E3: Industrie-Diamanten Rundschau, vol. 18, no. 3, (1984), G. Brandt: "Neue Bearbeitungsmaschinen für Halbleitermaterialien", pages 144 to 149

E5: DE-A-3 306 331

E6: US-A-4 144 099

were still discussed at the appeal stage.

V. Enclosed with their letter of 16 August 1999 in response to the Official Communication of the Board, the appellants submitted amended sets of claims according to a main request, a first and a second auxiliary request.

VI. Oral proceedings before the Board were held on 16. September 1999.

- The appellants requested that the decision under appeal be set aside and the patent be maintained on the basis of claims either of the main request, or of any of the first or second auxiliary request filed by letter of 16 August 1999.

- The respondent requested that the appeal be dismissed.

VII. Claims 1 and 7 of the main request read as follows:

"1. A method of producing a flat large size semiconductor wafer from a stock of silicon or gallium arsenide, the method comprising the steps of:

(a) processing one end face of said stock to form a first flat surface having a predetermined roughness of not more than 0.2 µm and a predetermined flatness of not more than ± 1.0 µm;

(b) then, cutting through the end portion of said stock defined by said flat surface transversely by a cutter to provide a large diameter slice of a predetermined thickness having opposite side faces defined respectively by said first flat surface and a cut surface resulting from said cutting;

(c) processing said cut surface of said slice to form a second flat surface parallel to said first flat surface using said first flat surface as a reference surface;

wherein

- in step (c) the first surface is held against a flat mounting surface of a porous body of a vacuum chuck by suction; and

- subsequently both surfaces of the semiconductor wafer are chemically etched for improving flatness and consecutively improving the warp of the semiconductor wafer to a value of not more than 3 µm.

"7. A method of producing a flat large size semiconductor wafer from a stock of silicon or gallium arsenide, the method comprising the steps of:

(a) processing one end face of said stock to form a first flat surface having a predetermined roughness of not more than 0.2 µm and a predetermined flatness of not more than ± 1.0 µm;

(b) then, cutting through the end portion of said stock defined by said flat surface transversely by a cutter to provide a large diameter slice of a predetermined thickness having opposite side faces defined respectively by said first flat surface and a cut surface resulting from said cutting;

(c) processing said cut surface of said slice to form a second flat surface parallel to said first flat surface using said first flat surface as a reference surface;

wherein

- in step (c) the first surface is held against the a flat mounting surface of a porous body of a vacuum chuck by suction; and

- subsequently both surfaces of the semiconductor wafer are stress-relieving annealed for improving flatness of said first and second flat surface and consecutively improving the warp of the semiconductor wafer.

VIII. The appellants argued as follows:

Document E1 discloses a process in which the grinding of the first surface 3a of the ingot is carried out while simultaneously the slice is separated by an annular cutter blade saw from the ingot. By contrast, in the patent in suit the end surface of the ingot is processed in a first step before the slice is cut from the stock, and then the cut surface is processed into a flat surface. Moreover, document E1 fails to mention the use of a flat mounting surface of a porous body of a vacuum chuck which, in the claimed process, is held against the first flat surface while processing the second surface (cut surface) of the slice. Document E1 also remains silent about chemical etching or a stress relieving treatment performed in the claimed process in order to further improve the flatness of the wafer surfaces. Therefore, the teaching of document E1 leads away from the claimed method.

Document E3 merely describes the use of a clamping device having a porous ceramic surface rather than a vacuum chuck during processing the second surface of the slice, as does the claimed process.

Although document E4 describes the mounting of the slice against movement by suction when processing the cut surface, it does not mention the measure of taking the first surface as a reference surface.

Document E5 is essentially concerned with chemical etching to improve warpage in general, and so does document E6 which refers to stress relief annealing the wafer after grinding in order to minimize warpage. However, both documents fail to mention the use of a "reference surface" when processing the cut surface. Therefore, also the teaching of document E1 taken either alone or in combination with any of documents E3 to E6 would not lead to the claimed process.

The respondent argued as follows:

Document E1 describes the feature of grinding the first surface to prepare a "reference surface" which is used in the following processing of the second cut surface in order to provide parallelism and flatness of the wafer surfaces. The process claimed in the disputed patent and that disclosed in document E1, therefore, are based on the same basic principle. It is clearly apparent from document E1 as a whole, in particular Figure 1 and the accompanying text that the step of grinding the first surface is finished before the wafer is cut off completely from the ingot. Thus, steps (a) to (c) of claim 1 of the disputed patent are known from document E1. Moreover, document E1 mentions a vacuum means which holds and transports the wafer after finishing the sawing operating. It goes without saying that the slice must always be mounted on a flat surface to enable grinding of the cut rear surface. This is conventionally done, as for instance disclosed in document E3, by mounting the slice on a porous ceramic surface of a clamping plate or, as set out in document E4, by using a vacuum chuck. Finally, the step of chemical etching or, alternatively, of stress relief annealing to minimize warpage caused by mechanical working merely represent common practice, as disclosed in documents E5 or E6, respectively. Consequently, the process defined in claim 1 or in claim 7 of the patent in suit does not involve an inventive step, and the same applies to the claims of the first and second auxiliary requests.

Reasons for the Decision

1. The appeal is admissible.

2. Inventive step

Document E1 which represents the closest prior art discloses a process in which both sides of the slice are ground and polished (rectifiées) to improve the surface flatness (cf. E1, page 1, lines 29 to 38). The term "rectification" is understood to comprise a grinding operation (rôdage) which includes, if necessary, one or more mechanical polishing steps or chemical etching (chemical polishing). In order to guarantee correct parallelism of both surfaces, the front surface is prepared by grinding in a first step, and this surface serves as a "reference surface" for the grinding operation of the second rear surface of the slice. However, in order to save time and costs, document E1 proposes to carry out the steps of grinding and slicing "simultaneously or almost simultaneously" in the same apparatus (cf. Figure 1). As in the disputed patent, the stiffness of the ingot is used to support the grinding operation which is performed in document E1 "as long as this stiffness is preserved" (cf. E1, page 2, lines 22 to 26). After a certain time interval but still during grinding, the inner diameter cutting operation to slice the wafer is started. (cf. Figure 1; page 3, lines 17 to 19). As mentioned on page 2, lines 36 to 38, processing of the first surface is finished before the slice is eventually separated from the ingot and is grasped by a vacuum means (tube d'aspiration, cf. E1, page 6, paragraph 1).

The basic problem to be solved by the process according to document E1 is to improve flatness and parallelism of the slice and, therefore, corresponds to the problem underlying the patent in suit. In both cases, the solution to the problem consists in using the first already ground and flattened surface as a "reference surface" when processing the second cut surface. No fundamental difference resides in the fact that, in the claimed process, the grinding of the front surface of the ingot and the slicing operation are consecutive steps rather than "almost simultaneous" operations as set out in document E1, since both processes aspire to benefit from the rigidity of the ingot as a stable basis when grinding the first surface and, consequently, bring about the same result.

It is true that document E1 is silent about the manner of how the reference surface of the slice is mounted during the processing of the cut surface and about chemical etching or annealing the wafer.

It is, however, evident to the expert that after slicing, the wafer must be handled and mounted by a suitable means during processing without damaging it. This is conventionally done by using a vacuum suction apparatus (vacuum chuck) which is for instance described in document E4, page 151, right hand column, penultimate paragraph bridging page 152, line 2 (Rückseitenschleifen). A similar means is disclosed in document E3, page 147 point 3.2.1. "Bearbeitungsablauf" which provides a porous ceramic clamping disc (Spannplatte aus Poröskeramik). Although it is only mentioned that the porous ceramic material of the clamping disc is rinsed by pressing water and compressed air through it from its reverse, it is an attractive suggestion to any expert that the disc is used in a vacuum mode during the grinding step. This interpretation is even more attractive, because the next paragraph explicitly mentions that the wafer is clamped on a rotating vacuum disc during the subsequent cleaning step.

The final step of chemically etching according to claim 1 to further reduce the warpage of the wafer to not more than 3 µm merely represents conventional practice in the art. Document E1, lines 28 to 38 for instance explicitly mentions chemical etching (polissage chimique) and also document E5, page 6, lines 13 to 17 proposes chemical etching to minimize warpage caused by mechanical working of the surface. This is also true for the stress relieving annealing step defined in claim 7 (cf. for instance document E4, page 152, left hand column, line 2 "Ausfeuern" or E6, column 1, lines 47 to 51, column 2, lines 55 to 58).

In view of these considerations, the subject matter of claims 1 and 7 of the main request does not involve an inventive step.

3. Claim 1 of the first auxiliary request further comprises the step that

"the cut surface is subjected to flattening as by polishing, grinding or cutting, using said first flat surface as a reference surface; and

- subsequently both surfaces of the semiconductor wafer are chemically etched for improving flatness and consecutively improving the warp of the semiconductor wafer to a value not more than 3 µm",

thus further specifying the processing of the cut surface. However, as has been mentioned above, these steps only represent conventional practice already known for example from document E1, page 1, lines 29 to 38. and page 6, lines 31 to 34. Hence, also claim 1 of the first auxiliary request does not comprise technical features justifying an inventive step.

This statement is also true for claim 1 of the second auxiliary request wherein

- after surface grinding of said second surface of the wafer, both said first and second flat surfaces of the semiconductor wafer are chemically etched for improving flatness and consecutively improving the warp of the semiconductor wafer to a value not more than 3 µm.

As is apparent from E1, page 1, lines 28 to 38, the grinding step (rôdage) of both sides is the essential step to establish flatness, followed by etching (chemical polishing) if necessary. Consequently, the subject matter of claim 1 of the second auxiliary request does not involve an inventive step either.

ORDER

For these reasons it is decided that:

The appeal is dismissed.