T 2323/14 (Multi-mode device/QUALCOMM) of 6.10.2020

Summary of Facts and Submissions

I. The appeal lies from the decision, dispatched with reasons dated 10 October 2014, refusing European patent application No. 11 166 665.7. For its reasons, the decision referred to the minutes (dated 18 September 2014) of a telephone conversation (on 17 September 2014) between the representative and the first examiner, in which it was argued that then claim 1 lacked inventive step over

D1: US 2002/0103949 A1.

II. Notice of appeal was filed on 17 November 2014, the appeal fee being paid on the same day. A statement of grounds of appeal was received on 25 November 2014, in which the appellant requested that the decision be set aside and a patent be granted on the basis of newly filed, amended claims 1-14. The other application documents on file are the description pages 1, 1a, and 9-12, filed on 1 July 2013, the drawing sheet 1/2 filed on 19 September 2012, and the description pages 2-8 and the drawing sheet 2/2, as originally filed.

III. In a summons to oral proceedings, the board informed the appellant of its preliminary opinion that the claimed invention lacked inventive step over D1, Article 56 EPC.

IV. In response to the summons, by letter dated 24 August 2020, the appellant filed amended claims 1-14 according to an auxiliary request.

Claim 1 of the main request reads as follows:

"A multi mode mobile device (10) configured to switch between a communication mode and a computing mode, the multi mode mobile device (10) comprising:

a communication processor (18)

configured to facilitate wireless voice and data communication, when the multi mode mobile device (10) is in the communication mode;

an application processor core (36) of an application processor (34)

configured to execute at least one computing application, when the multi mode mobile device (10) is in the computing mode; and

a user-manipulable input device (16)

to select the operational mode of the multi mode mobile device (10) responsive to a user's activity, the user-manipulable input device (16) configured to switch between the computing mode and the communication mode based on the selection

characterized by

a Processor Local Bus, PLB, bridge processor (62)

whose functions are implemented by a dedicated portion of the communication processor (18), and

wherein the PLB bridge processor (62) is configured to enable the communication processor (18) to function as a master processor for controlling peripheral devices and the application processor core (36) is powered off to extend battery (14) life, when the communication mode is selected, and

wherein the PLB bridge processor (62) is configured to enable the communication processor (18) to function as a peripheral processor, when the computing mode is selected; and

wherein the communication processor (18) and the application processor (34) are powered by a battery (14) and are integrated on a single chip."

Claim 1 of the auxiliary request differs from claim 1 of the main request in that the expression "characterized by" has been struck out and the "user-manipulable input device (16) is now specified as being (additions underlined, deletions struck through):

"... to select the operational mode of the multi mode mobile device (10) responsive to a user's activity, the user-manipulable input device (16) implementing a mode selector configured to automatically switch between the computing mode and the communication mode [deleted: based on the selection] responsive to a user's activity;"

V. Oral proceedings were held by video conference on the scheduled day, at the end of which the chairman announced the decision of the board.

Reasons for the Decision

The invention

1. The application is concerned with the power consumption of mobile telephones which, in addition to their communication functions, have developed into personal computing devices (see paragraph 2 of the description). The application criticises the excessive power consumption in conventional architectures in which a main processor must always be active as a master processor to control, for instance, the telephony peripherals (see paragraph 4). As a solution, a "mobile multi mode computing device" is proposed, which can switch between two operational modes: communication and computing (see paragraph 14). To switch between the modes, a "mode selector" is provided which can either be manipulated by a user or automatically triggered; for instance, when the user starts to dial a telephone number, the device can switch to communication mode (paragraph 14). The modes are supported by a communication processor and an application processor (see paragraphs 5 and 13) which may be on separate chips or "disposed on the same chip" (see paragraphs 9 and 19). Furthermore, a PLB (processor local bus; see paragraphs 6 and 21) is provided to which the communication processor is connected via a PLB bridge processor so that it can act as a master of the PLB and thereby access peripheral hardware devices (see paragraph 6). The PLB bridge processor, via the mode selector, determines whether the device is in computing or communication mode and, accordingly, designates the application processor or the communication processor to be the master processor (see paragraphs 23 to 25). In communication mode, the application processor is "deenergized", i.e. powered down.

2. The application contains no details of the described and claimed integration, any difficulty that would have to be overcome in the course of an integration, or any specific advantage of such integration. The disclosure is limited to general statements such as that the processor modules "could be realized on the same integrated circuit module, whether this be through a multi-chip-module packaging technique or through the design of the entire circuit as a single chip" and that "If desired, the functions of the PLB bridge processor [...] can be implemented by, e.g., a dedicated portion of the communication processor" (see, in particular, paragraphs 9, 19 and 23).

The prior art

3. D1 discloses a system in which a PDA is integrated with a separate (typically mobile; see paragraph 3) PC into a "unit that can remain continuously powered on, have a long life battery, consume minimal power, and be accessible at any given moment" (see paragraphs 9 and 15). The proposed architecture is disclosed in figure 3 (cf. also paragraph 30). Accordingly, the PC CPU is connected via a south bridge controller (110) to two buses, a PCI bus (300) connecting it to a wireless communication device (345), and an LPC bus (305) connected to a "quick switch", keyboard and mouse, the PDA and the wireless communication device (nos. 310, 320, 325, 330, 335 and 340). All components may be integrated into or with the PC (see paragraphs 33 and 34). In particular, the PDA and the wireless communication device may be provided as a mini PCI card with (see figures 4 and 5, and paragraphs 20, 34, 35), and all components may also be integrated into a PC system board (see claim 12). At least in this latter scenario, the board considers it to be implicit that both processors are powered by the same battery (see also paragraph 15). The wireless communication device is shared between the PC CPU and the PDA system. When the PC is active, the PDA is a "slave" to the PC, while, when the PC is inactive, it operates independently and can still access the wireless communication device. The PDA will remain "continuously active". A "switch" - presumably the quick switch 320 depicted in figure 3 - is provided which, according to whether the PC is active or not, will "give" control of the common peripherals to either the PC or the PDA (see paragraph 18 and 31).

The decision under appeal

4. The examining division started from D1 and identified two differences between D1 and then claim 1, namely that

1) the application processor core is powered off and

2) the PLB bridge processor is implemented as a dedicated portion of the communication processor.

In its comparison, the examining division identified the claimed PLB bridge processor with the south bridge processor (110) of D1.

4.1 The examining division considered difference 1) to lack inventive step over D1, noting that D1 already expressly disclosed the general goal of reducing power consumption (see the decision, point 1.2 of the reasons).

4.2 Difference 2) was considered by the examining division to be an obvious design choice (point 1.3 of the reasons).

The grounds of appeal

5. Claims 1 and 8 of the present main request were mainly amended over the independent claims subject to the refusal by the introduction of the feature that "the communication processor and the application processor are integrated on a single chip" (see the grounds of appeal, section 4.1, first four lines).

6. The appellant argues that D1 does not disclose the following features (see page 9, last line, item [1.4], to page 10, item [1.6]):

[1.4] A PLB bridge processor,

[1.4.1] whose functions are implemented by a dedicated portion of the communication processor,

[1.4.2] wherein the PLB bridge processor is configured to enable the communication processor to function as a master processor for controlling peripheral devices and the application pro­cessor is powered off to extend battery life, when the communication mode is selected, and

[1.4.3] wherein the PLB bridge processor is configured to enable the communication processor to function as a peripheral processor, when the computing mode is selected, and

[1.6] [the communication processor and the application processor] are integrated on a single chip.

6.1 The appellant paraphrases these differences by saying that D1 does not describe a multi-mode mobile device in which a single chip provides computing as well as communication functions (cf. feature [1.6]) nor that the part of the chip responsible for the communication functionality also provides the logic to control the switching between the computing tasks and the communication functions (cf. features [1.4], [1.4.1] to [1.4.3]) (see the grounds of appeal, page 8, first full paragraph).

6.2 The appellant also states that the effect of the integration is a further reduced power consumption (paragraphs 2 and 3 on that page) and then argues that, even if the skilled person were assumed always to be driven by the technical desire to miniaturize logic circuits and to integrate several processors on one chip, he or she would not get any hint from document D1 to implement, in particular, the south bridge controller of D1 (i.e. corresponding in D1 to the PLB controller) as a "portion of the PDA system". Therefore, the claimed invention must be found to be non-obvious (see the paragraph bridging pages 8 and 9).

The board's findings

7. Firstly, the board agrees with the appellant and the decision under appeal that D1 is a suitable starting point for assessing inventive step.

7.1 D1 discloses an "application processor" (the PC CPU 100) and a communication processor (the PDA system 340 processor, in view of the presence of the wireless communication device 345). D1 also discloses that the system operates in two modes: the computing mode (when the PC is active) and the communication mode (when only the PDA remains active).

7.2 In contrast to the decision however, and also deviating from its own preliminary opinion in this regard, the board finds that the claimed PLB bridge processor can be identified not with the south bridge controller of D1 but with the "PDA companion input output processor", also referred to as ASIC 205 (see figure 2, and paragraph 29). The ASIC "can interface to peripheral devices in a similar manner as the south bridge controller [...] of the PC architecture" (loc. cit.). Moreover, the ASIC is present in the embodiment according to figure 3, even though it is not depicted (see paragraph 30, lines 6 and 7 from the bottom).

7.3 Hence, D1 discloses logic which is configured to enable the communication processor or the application processor to act as a "master" processor for controlling peripheral devices depending on the mode. This logic is spread over the ASIC, which enables the PDA to control the peripheral devices and the switch (see paragraph 18 and no. 320 in figure 3) which "designates" which processor is to act as a master (cf. in this regard paragraph 24 of the present application).

8. D1 does not expressly disclose that the application processor is "powered off" when it is inactive. It also does not disclose that the ASIC (i.e. the claimed PLB) comprises the actual means for switching between the application and control processors.

8.1 Accordingly, D1 discloses all but the following features of claim 1:

1) the application processor core is powered off when inactive;

2) the PLB bridge processor is "configured to enable" the processors to act as master processors depending on the mode,

3) the PLB processor is implemented as a dedicated portion of the communication processor and

4) the communication processor and the application processor are integrated on a single chip.

8.2 The board agrees with the conclusion of the examining division, which the appellant has not challenged, that feature 1 does not establish an inventive step over D1, and with the reasons given. More specifically, although D1 does not expressly disclose that the PC is powered off when inactive, the board considers this to be an obvious measure in view of the declared goal of D1 to reduce power consumption.

8.3 Difference features 2 to 4 concern the integration of circuitry which, as is commonly known in the art, reduces size and power consumption and increases speed. The board considers that, at the priority date, there was, indeed, a general trend towards miniaturization and integration in the art of computer circuitry. Moreover, following this trend would not have required the skilled person to exercise inventive skill, even without an explicit hint to this effect in D1.

8.4 This applies in particular to difference feature 4. The appellant's argument, put forward in the letter of 24 August 2000 (see page 5, last paragraph, and page 6, table), that multi-core processors have only been avai­lable since 2005 is inaccurate. For instance, the IBM Power4 processor, a dual core processor, was available from 2001. The board did not introduce a written document as evidence of this fact but, in view of a pertinent Wikipedia page, the appellant accepted it.

8.5 The board notes that D1 discloses an integration of the PDA with the wireless communication component on a mini PC card. In the board's view, this implies the integration of all components of the PDA system (figure 2) with the wireless communication component and suggests, in view of the general trend towards integration, the integration of all these components "on a single chip". In this scenario, the board thus considers it obvious to make the ASIC 205 "a dedicated portion of the communication processor", i.e. the PDA (difference feature 3).

8.6 The board considers further that it would have been obvious in view of the general trend towards integration, to integrate the communication processor and the application processor (PDA and PC) "on a single chip".

8.7 Up to this point, this integration does not cover, however, the integration of the "switch" which actually controls which processor acts as the master (difference feature 2).

8.8 The board however finds that there is only a small number of possibilities when integrating the switch with the remaining components. One of them is the integration with the PDA. The board finds this to be obvious for two reasons. Firstly, the appellant has not put forward any specific problem which the integration of the switch with the ASIC and the PDA would solve, beyond the generally known effects of integration, such as shorter wires, faster switching and lower power consumption (aside from the fact that any such effect for the integration of the switch with the ASIC and the PDA would probably be only marginal). From that perspective, an integration of the switch with the ASIC and the PDA would have been an ob­vi­ous alternative. Secondly, D1 discloses that the PDA remains continuously active (paragraph 19) and thus powered on. It would thus have been obvious to integrate the switch, which also needs to be continuously operable, with the PDA (and thus the ASIC).

8.9 The board concludes that claim 1 of the main request lacks an inventive step over D1, Article 56 EPC.

9. Regarding the auxiliary request, the board notes that D1 discloses a switch (see paragraph 18) which controls whether the PDA or the PC acts as a "master" to the peripheral devices, and thus as a "mode selector". D1 also discloses that the "user can selectively choose" which processor is the master, which, in the board's understanding at least suggests some form of "user-manipulable device" by which users can express their choice and trigger the (otherwise) automatic mode change. Whatever it is that the user does in order to effect this change, it falls within the meaning of "a user's activity" in the claimed breadth.

10. The board therefore considers that the additional features according to claim 1 of the auxiliary request are all known (or immediately obvious) from D1 and cannot, therefore, change the above conclusion that claim 1 lacks inventive step, Article 56 EPC.

Order

For these reasons it is decided that:

The appeal is dismissed.