T 1358/13 () of 26.4.2018

Summary of Facts and Submissions

I. The appeal concerns the decision of the examining divi­sion refusing the European patent application No. 07 124 161 for lack of inventive step (Article 56 EPC) of the subject-matter claimed according to the former main and auxiliary requests.

II. Reference is made to the following documents:

D3: |WO 2005/122120 A, |

D6: |US 2004/0155574 A, |

D8: |Zakya Kafafi (ed.): Organic Electro­lumines­cence, CRC Press Taylor & Francis Group, USA, 2005, Chapter 8 - AMOLED Display Pixel Electronics.|

III. At the oral proceedings before the board the appellant (applicant) requested that the decision under appeal be set aside and a patent be granted based on a main re­quest or a first auxiliary request, both filed with letter dated 26 March 2018, or a second or third auxil­iary request, both filed as main and first auxiliary request, respectively, with the grounds of appeal.

IV. The wording of repective independent claim 4 of the main and second auxiliary requests and of repective independent claim 1 of the first and third auxiliary requests is as follows (board's labelling "(a)", "(b)", ..., "(ad)"):

Second auxiliary request:

"4. A pixel driving method for an organic light emitting device, comprising:

(a) charging a data voltage (DATA) supplied through a data line to a storage capacitor (C61) by driving a first P-channel switching transistor (T61) while cutting off a driving current (IOLED) through an organic light emitting diode (OLED61) in a data voltage programming period (P1); and

(b) powering the organic light emitting diode (OLED61) to emit light by driving a P-channel driving transistor (T62) by the data voltage (DATA) charged onto the storage capacitor (C61) while supplying the driving current (IOLED) through the organic light emitting diode (OLED61) in a data voltage emission period (P2),

(c) wherein a switching control signal (EMS) is supplied to a gate of a second P-channel switching transistor (T63) during the data voltage programming period (P1) and thus the driving current (IOLED) through the organic light emitting diode (OLED61) is cut off,

(d) wherein one side of the storage capacitor (C61) is connected to a gate of the P-channel driving transistor (T62), and another side of the storage capacitor (C61) is connected to a second node (A) connected to an upper power supply voltage (ELVDD) terminal,

(e) wherein the second P-channel switching transistor (T63) has a drain connected to an anode of the organic light emitting diode (OLED61) and a source connected to a drain of the P-channel driving transistor (T62), wherein a cathode of the organic light emitting diode (OLED61) is connected to a lower power supply voltage (VSS) terminal and a source of the P-channel driving transistor (T62) is connected to the upper power supply voltage (ELVDD) terminal,

(f) wherein, when a data voltage programming operation is completed, the first P-channel switching transistor (T61) is turned off so that a first node (B), where the one side of the storage capacitor (C61) and the gate of the P-channel driving transistor (T62) are connected to each other, is in an electrical floating status during the data voltage emission period (P2),

(g) wherein a voltage of the second node (A), where the other side of the storage capacitor (C61) and the source of the P-channel driving transistor (T62) are connected to each other, decreases from an upper power supply voltage (ELVDD) during the data voltage emission period (P2), wherein the second node (A) is connected to the anode of the organic light emitting diode (OLED61) via the P-channel driving transistor (T62) during the data voltage emission period (P2),

(h) wherein, when the voltage of the second node (A) decreases during the data voltage emission period (P2), the voltage of the first node (B) is changed by being coupled to the storage capacitor (C61) connected between the first and second nodes (B, A), while a voltage between the gate terminal and the source terminal of the P-channel driving transistor (T62) is not changed during the data voltage emission period (P2), and

(i) wherein a driving current (IOLED) of the organic light emitting diode (OLED61) is not influenced by the voltage decrease of the second node (A), and is influenced by the data voltage stored in the storage capacitor (C61)."

Third auxiliary request:

"1. A method for driving a display panel (30) of an organic light emitting device (OLED), the display panel (30) comprising:

(j) a pixel array comprising a plurality of pixels (PX) arranged in rows and columns, each pixel (PX) comprising a first N-channel switching transistor (T41) having source, drain and gate terminals, a second N-channel switching transistor (T43) having source, drain and gate terminals, an N-channel driving transistor (T42) having source drain and gate terminals, a storage capacitor (C41) having first and second terminals, and an organic light emitting diode (OLED41) having an anode and a cathode,

(k) wherein the drain terminal of the first N-channel switching transistor (T41), the gate terminal of the N-channel driving transistor (T42) and the first terminal of the storage capacitor (C41) are connected to a first node (B),

(l) wherein the second terminal of the storage capa­citor (C41) and the source terminal of the N-channel driving transistor (T42) are connected to a second node (A) connected to a lower power supply voltage (VSS),

(m) wherein the source terminal of the second N-channel switching transistor (T43) is connected to the drain terminal of the N-channel driving transistor (T42),

(n) wherein the drain terminal of the second N-channel switching transistor (T43) is connected to the cathode of the organic light emitting diode (OLED41), and

(o) wherein the anode of the organic light emitting diode (OLED41) is connected to an upper power supply voltage (ELVDD);

the display panel (30) further comprising:

(p) a plurality of scan lines (S1, ..., Sn) and a plurality of data lines (D1, ..., Dm) connected to the pixel array, each scan line connected to the gate terminals of the first N-channel switching transistors (T41) of all pixels (PX) in a respective row of the pixel array, each data line connected to the source terminals of the first N-channel switching transistors (T41) of all pixels (PX) in a respective column of the pixel array;

(q) wherein the display panel (30) comprises first to k-th adjacent display panel regions (30A, 30B, ..., 30K) in a horizontal direction (k being an integer greater than one), each display panel region including a plurality of adjacent scan lines of the plurality of scan lines (S1, ..., Sn) as well as the corresponding pixels (PX) connected to said plurality of adjacent scan lines;

(r) wherein the pixels (PX) in each display panel re­gion of the k display panel regions (30A, 30B, ..., 30K) all share the same lower power supply voltage, wherein the lower power supply voltage (Vss[1], Vss[2], ..., Vss[k]) for each display panel ragion [sic] (30A, 30B, ..., 30K) is in each case supplied by a corresponding lower power supply voltage supply line diverging from a common node (S0) coupled to a lower power supply voltage supply terminal (Vss_supply);

the method comprising:

(s) determining a data voltage programming period (P1) and a data voltage emission period (P2) for each display panel region (30A, 30B, ..., 30K), wherein the data voltage programming period (P1) is equal to a frame period divided by the number k of display panel regions (30A, 30B, ..., 30K) and the data voltage emission period (P2) is equal to the frame period minus the data voltage programming period (P1);

(t) sequentially providing scan signals (Scan[1], ..., Scan[n]) to the plurality of scan lines (S1, ..., Sn) during the frame period;

(u) sequentially driving the plurality of pixels (PX) during the frame period by supplying respective scan signals (Scan[1], ..., Scan[n]), data voltages (DATA) and switching control signals (EMS[1], EMS[2], ..., EMS[k]) to the pixels (PX), wherein driving each pixel (PX) comprises:

(v) charging a data voltage (DATA) supplied through a respective data line of the plurality of data lines (D1, ..., Dm) to the storage capacitor (C41) by driving the first N-channel switching transistor (T41) while cutting off a driving current (IOLED) through the organic light emitting diode (OLED41) in the data voltage programming period (P1); and

(w) powering the organic light emitting diode (OLED41) to emit light by driving the N-channel driving transistor (T42) by the data voltage (DATA) charged onto the storage capacitor (C41) while supplying the driving current (IOLED) through the organic light emitting diode (OLED41) in the data voltage emission period (P2),

(x) wherein a switching control signal (EMS) is supplied to the gate of the second N-channel switching transistor (T43) during the data voltage programming period (P1) and thus the driving current (IOLED) through the organic light emitting diode (OLED41) is cut off,

(y) wherein, when a data voltage programming operation is completed, the first N-channel switching transistor (T41) is turned off so that the first node (B), where the first terminal of the storage capacitor (C41) and the gate terminal of the N-channel driving transistor (T42) are connected to each other, is in an electrical floating status during the data voltage emission period (P2),

(z) wherein a voltage of the second node (A), where the second terminal of the storage capacitor (C41) and the source of the N-channel driving transistor (T42) are connected to each other, increases from a lower power supply voltage (VSS) during the data voltage emission period (P2), wherein the second node (A) is connected to the cathode of the organic light emitting diode (OLED41) via the N-channel driving transistor (T42) during the data voltage emission period (P2),

(aa) wherein, when the voltage of the second node (A) increases during the data voltage emission period (P2), the voltage of the first node (B) is changed by being coupled to the storage capacitor (C41) connected between the first and second nodes (B, A), while a voltage between the gate terminal and the source terminal of the N-channel driving transistor (T42) is not changed during the data voltage emission period (P2), and

(ab) wherein a driving current (IOLED) of the organic light emitting diode (OLED41) is not influenced by the voltage increase of the second node (A), and is influenced by the data voltage stored in the storage capacitor (C41);

the method further comprising:

(ac) applying, for a time duration of the data voltage programming period (P1), a switching control signal (EMS[1]) of a 'low' level to the gate terminals of the second switching transistors (T43) of all pixels (PX) included in an i-th display panel region (30A) of the k display panel regions (30A, 30B, ..., 30K), wherein 1<=i<=k, while applying switching control signals (EMS[2], ..., EMS[k]) of a 'high' level to the gate terminals of the second switching transistors (T43) of the pixels (PX) included in the remaining display panel regions (30B, ..., 30K) except the i-th display panel region (30A), thus programming the pixels (PX) included in the i-th display panel region (30A) while emitting light by the pixels (PX) included in the remaining display panel regions (30B, ..., 30K) except the i-th display panel region (30A);

(ad) subsequently applying, for a time duration of the data voltage programming period (P1), a switching control signal (EMS[2]) of a 'low' level to the gate terminals of the second switching transistors (T43) of all pixels (PX) included in the (i+1)-th display panel region (30B) of the k display panel regions (30A, 308, ..., 30K) while applying switching control signals (EMS[1], EMS[3], ..., EMS[k]) of a 'high' level to the gate terminals of the second switching transistors (T43) of the pixels (PX) included in the remaining display panel regions (30A, 30C, ..., 30K) except the (i+1)-th display panel region (30B), thereby programming the pixels (PX) included in the (i+1)-th display panel region (30B) while emitting light by the pixels (PX) included in the remaining display panel regions (30A, 30C, ..., 30K) except the (i+1)-th display panel region (30A)."

Main request:

Claim 4 of the main request corresponds to claim 4 of the second auxiliary request, wherein features (a), (c), and (e) are essentially combined and reworded, features (b) and (h) are essentially reworded and feature (g) is replaced by the following feature:

(g)* "wherein a voltage of the second node (A), where the other side of the storage capacitor (C61) and the anode of the organic emitting diode (OLED61) are connected via the source of the P-channel driving transistor (T62), decreases from an upper power supply voltage (ELVDD) during the data voltage emission period (P2)".

First auxiliary request:

Claim 1 of the first auxiliary request corresponds to claim 1 of the third auxiliary request, wherein features (l), (o), (v), (w), (x), and (aa) are essentially reworded, and feature (z) is replaced by the following feature:

(z)* "wherein a voltage of the second node (A), where the second terminal of the storage capacitor (C41) and the cathode of the organic emitting diode (OLED41) are connected via the source of the N-channel driving transistor (T42), increases from a lower power supply voltage (VSS) during the data voltage emission period (P2)".

V. The appellant argued essentially as follows:

V.1 Main request and first auxiliary request - admission

The claims of the main request and the first auxiliary request were amended by bringing the features into a new order for making them clearer and better suited for overcoming the objections in the decision under appeal than the previously filed claims. They were also not so complex and could be dealt with by the board. Hence the main and first aux­il­iary request should be admitted into the proceedings.

V.2 Second auxiliary request - inventive step

The subject-matter of claim 4 of the second auxiliary request differed from the method of document D3 in that

- the organic LED had an anode connected to a drain of a second P-channel switching transistor,

- a switching control signal was supplied to a gate of the second switching transistor during the programming period so that the current through the organic LED was cut off,

- the second switching transistor had a source connected to the drain of the P-channel driving transistor.

With this configuration, when a change in the higher voltage VDD occurred, the changed voltage VDD did not affect the current flowing through the organic LED. Docu­ment D3 did not teach the use of P-channel tran­sis­tors and document D8 did not teach a second switching tran­sistor. The claimed subject-matter was neither taught nor suggested by the documents D3 and D8 alone or in combination.

V.3 Third auxiliary request - inventive step

The problems solved by the invention were the reduc­tion of the brightness flicker as well as of the non-uni­form­ity of the brightness. There was no explicit teach­ing in document D3 on how to drive the pixels. In par­tic­ular, page 14, paragraph 6 of D3 did not provide enough information and did not allow the skilled person to get to the claimed method. Document D6 did not disclose how the panel was driven. The claimed subject-matter was neither taught nor suggested by the documents D3 and D6 alone or in combination.

Reasons for the Decision

1. Main request and first auxiliary request - admission

1.1 The main request and the first auxiliary request were filed one month before the date of the oral proceedings before the board. They constitute therefore an amendment to the appellant's case after it has filed its grounds of appeal and may be admitted into the proceedings and considered at the board's discretion (Article 13(1) RPBA).

1.2 In accordance with established case law, late-filed requests are inadmissible if - prima facie - they do not overcome the outstanding objections under the EPC or give rise to new objections (Case Law of the Boards of Appeal of the EPO, 8th edition 2016, sections IV.E.4.4.1 and 4.4.2).

1.3 In the present case the board had stated in the commu­nication under Article 15(1) RPBA its provisional opin­ion that the subject-matter of claim 4 of the then main request (present second auxiliary request) and of claim 1 of the then auxiliary request (present third auxil­iary request) lacked inventive step. These were the only objections mentioned.

1.4 Claim 4 of the main request differs from claim 4 of the second auxiliary request in that features (a), (b), (c), (e), and (h) are essentially reworded and in that feature (g) is replaced by feature (g)*. The latter relates to a re-definition of the "second node (A)". These amendments do not play any role in the appel­lant's arguments in relation to inventive step. Prima facie the board is of the opinion that indeed these amendments do not contribute anything towards over­coming the objec­tions in relation to a lack of inventive step.

On the other hand, in the amended feature (g)* it is claimed that the other side of the storage capacitor and the anode of the organic LED "are connected via the source of the P-channel driving transistor". However, the second switching transistor T63, which is arranged between the driving transistor and the organic LED, is not claimed. Moreover, it is unclear what is meant by the claimed connection as a conducting state of the inter­vening transistors appears to be a pre-condition of any electrical connection between the storage capacitor and the organic LED. Therefore - prima facie - the amend­ments in feature (g)* give rise to new objections under Articles 84 and 123(2) EPC.

1.5 For corresponding reasons, the board is of the opinion that - prima facie - the amendments effected in rela­tion to claim 1 of the first auxiliary request do not contribute to over­coming the objec­tions in relation to lack of inventive step and give rise to new objections under Articles 84 and 123(2) EPC.

1.6 In view of the above, the main request and the first auxiliary request are not admitted into the appeal proceedings (Article 13(1) RPBA).

2. Second auxiliary request - inventive step

2.1 Closest state of the art

In the decision under appeal the examining division assessed inventive step starting from document D3 as the closest state of the art. This was not disputed by the appellant. Indeed, document D3 discloses subject-matter that is conceived for the same purpose as the claimed invention, namely for providing a pixel driving method for an organic light emitting device, and has the most relevant technical features in common with it, as detailed below. Document D3 is therefore regarded as the closest state of the art.

2.2 Distinguishing features

2.2.1 Document D3 discloses (see page 1, lines 3-5 and 25-29; page 2, lines 4-11; page 12, lines 10-39; Figure 7) a method for driving organic light emitting diodes of an illuminated display and to a corresponding circuit. In particular, accord­ing to the embodiment of Figure 7, a pixel element 3 in an illuminated display has current control means 4 formed of a field effect transistor and light emitting means 8 formed of an OLED (see "iOLED" in Figure 7, designating the current through the light emitting means 8). The control signal USet is ap­plied to the control electrode of the current con­trol means 4 via first switching means 10. Signal retain­ing means 6, which are formed for example by a capacitor, hold the control signal USet when first switch­ing means 10 inter­rupt the connection to a con­trol circuit. The control signal is applied when no current is flowing in the supply line 20. Second switch­ing means 12 are provided for this purpose, and interrupt the current path via the light emitting means 8 to ground. In this case, there are no potential differ­ences on the supply line 20, and the nominal control signals are applied to the current control means 4. When the respective control signals have been supplied to all of the pixel elements 3 which are connected to a common supply line, and the first switching means 10 have been opened, the second switching means 12 are closed. The current flow results in potential differ­ences, in a known manner. The signal retaining means 6 hold the relative control signals with respect to the potential at the point at which the respective pixel element 3 is connected to the supply line 20. An offset voltage sets itself with respect to the reference potential to which the nominal control signals are related. One method for driving such a pixel element 3 comprises a programming phase P1 and an operating phase P2. During the programming phase P1, the current flow through the light emitting means and through the pixel elements 3 is interrupted, so that no steady-state potential difference exists on the supply line 20. At the end of the programming phase P1, the interruption of the current flow is cancelled, and the operating phase P2 starts. The desired current is now determined by the relative control signal, which is held in the signal retaining means 6 and is independent of poten­tial fluctuations on the supply line 20, or follows them.

2.2.2 In the decision under appeal the examining division held that document D3 did not disclose the claimed features relating to the P-channel driving transistor and the P-channel switching transistors (see points 2.1 to 2.3 of the Reasons).

The appellant argued that in addition document D3 did not disclose that a switching control signal was supplied to a gate of the second switching transistor during the programming period so that the current through the organic LED was cut off.

The board notes that it is disclosed in document D3 that during the programming phase P1 the current through the light emitting means 8 is cut off using the second switching means 12. Merely a concrete implementation of the switching means 12 has not been disclosed in that document.

2.2.3 Using the wording of claim 4 of the second auxiliary request, document D3 discloses therefore a pixel driving method for an organic light emitting device, comprising:

(a)' charging a data voltage (USet) supplied through a data line to a storage capacitor (signal retain­ing means 6 formed by a capacitor) by driving first switching means (10) while cutting off a driving current through an organic light emitting diode (light emitting means 8 formed by an OLED) in a data voltage programming period (programming phase P1) (page 12, lines 34-36); and

(b)' powering the organic light emitting diode (light emitting means 8 formed by an OLED) to emit light by driving a driving transistor (current control means 4 formed by a field effect transis­tor) by the data voltage (USet) charged onto the storage capacitor (signal retaining means 6 formed by a capacitor) while supplying the driving current (iOLED) through the organic light emitting diode (light emitting means 8 formed by an OLED) in a data voltage emission period (operating phase P2) (page 12, lines 36-39),

(c)' wherein a switching control signal is supplied to second switching means (12) during the data voltage programming period (programming phase P1) and thus the driving current (iOLED) through the organic light emitting diode (light emitting means 8 formed by an OLED) is cut off (page 12, lines 34-36),

(d)' wherein one side of the storage capacitor (signal retain­ing means 6 formed by a capacitor) is connected to a gate of the driving transistor (current control means 4 formed by a field effect transis­tor), and another side of the storage capacitor is connected to a second node connected to an upper power supply voltage terminal (supply line 20) (see Figure 7),

(e)' wherein the second switching means (12) is connected to an anode of the organic light emitting diode (light emitting means 8 formed by an OLED) and to the driving transistor (current control means 4 formed by a field effect transis­tor), wherein a cathode of the organic light emitting diode (light emitting means 8 formed by an OLED) is connected to a lower power supply voltage terminal and the driving transistor (current control means 4 formed by a field effect transis­tor) is connected to the upper power supply voltage terminal (supply line 20) (Figure 7),

(f)' wherein, when a data voltage programming operation is completed, the first switching means (10) are turned off (page 12, lines 21-23) so that a first node, where the one side of the storage capacitor (signal retain­ing means 6 formed by a capacitor) and the gate of the driving transistor (current control means 4 formed by a field effect transis­tor) are connected to each other, is in an electrical floating status during the data voltage emission period (operating phase P2) (page 12, lines 21-26),

(g)' wherein a voltage of the second node, where the other side of the storage capacitor (signal retain­ing means 6 formed by a capacitor) and a channel terminal of the driving transistor (current control means 4 formed by a field effect transis­tor) are connected to each other, decreases from an upper power supply voltage (VDD) during the data voltage emission period (operating phase P2) (page 12, lines 21-26), wherein the second node is connected to the anode of the organic light emitting diode (light emitting means 8 formed by an OLED) via the driving transistor (current control means 4 formed by a field effect transis­tor) during the data voltage emission period (operating phase P2),

(h)' wherein, when the voltage of the second node decreases during the data voltage emission period (operating phase P2), the voltage of the first node is changed by being coupled to the storage capacitor (signal retain­ing means 6 formed by a capacitor) connected between the first and second nodes, while a voltage between the gate terminal and a channel terminal of the driving transistor (current control means 4 formed by a field effect transis­tor) is not changed during the data voltage emission period (operating phase P2) (page 12, lines 21-26), and

(i) wherein a driving current (iOLED) of the organic light emitting diode (light emitting means 8 formed by an OLED) is not influenced by the voltage decrease of the second node, and is influenced by the data voltage stored in the storage capacitor (signal retain­ing means 6 formed by a capacitor) (page 12, lines 21-26).

2.2.4 Hence, the subject-matter of claim 4 of the second auxiliary request differs from the method of document D3 in that

(a)'' the first switching means are formed by a first P-channel switching transistor,

(b)'' the driving transistor is formed by a P-channel driving transistor,

(c)'' the switching control signal is supplied to the gate of a second P-channel switching transistor,

(e)'' the second P-channel switching transistor has a drain connected to an anode of the organic light emitting diode and a source connected to a drain of the P-channel driving transistor and the source of the P-channel driving transistor is connected to the upper power supply voltage terminal,

(g)'' at the second node the other side of the storage capacitor and the source of the P-channel driving transistor are connected to each other,

(h)'' the voltage between the gate terminal and the source terminal of the P-channel driving transistor is not changed during the data voltage emission period.

2.3 Objective technical problem

The appellant argued that the claimed method had the advantage that, although a change in a higher voltage VDD occurred, the changed higher voltage VDD did not affect a current flowing through the OLED.

However, the board notes that this alleged advantage relates to features which are already known from docu­ment D3, as described above, concerning the inter­rup­tion of the current flow through the light emitting means 8 during a programming phase P1 so that no poten­tial var­ia­tions exist on the supply line 20 during that phase. On the other hand, the technical effect of the distin­guishing features mentioned under point 2.2.4 above is merely to provide concrete implementations of the first and second switching means and of the driving transis­tor.

The objective technical problem is therefore to imple­ment the method known from document D3.

2.4 Obviousness

2.4.1 Arguing in favour of inventiveness the appellant merely stated that the subject-matter of claim 4 of the second auxiliary request was neither taught nor suggested by documents D3 and D8 alone or in combination.

2.4.2 The board agrees with the examining division (see Reason 2.4 of the contested decision) in that the use of p-MOS transistors as switching means and current control means and the corresponding circuit connections as claimed in the distinguishing features are normal circuit design choices for the rele­vant skilled person - an expert in the field of display techno­logy - when imple­menting the method of document D3.

Moreover, the examining division was correct in regard­ing the teaching of document D3 as incomplete, in par­ticu­lar in relation to how the switching means and the current control means are implemented, and in consid­ering that one of the possible ways of "filling the gap" which would naturally or readily occur to the skilled person, namely the use of p-MOS transistors as switching and current control means, results in the claimed inven­tion. Under similar circum­stances inven­tive step was also denied, for example, in the deci­sions T 475/09 (Reason 9.4), T 263/07 (Reason 10.2.1), and T 597/94 (Reason 2.4).

2.4.3 The examining division's conclusion is confirmed when considering document D8, which relates to a chapter concerning active matrix OLED (AMOLED) display pixel electronics in a textbook and refer­ence book on organic electroluminescence and can therefore be regarded­­ as illustrating the skilled person's common general know­ledge. Figure 8.14 of that document shows two examples of pixel circuits for an AMOLED display, i. e. the same kind of circuit as that in Figure 7 of document D3. The first example of Figure 8.14(A) illustrates that p-MOS transistors may indeed be used as switching means and current control means in such a pixel circuit.

2.4.4 The skilled person would thus arrive at the claimed sub­ject-matter without the need of being prompted by any suggestion or hint in a document but by only rely­ing on his common general knowledge for solving the posed objective technical problem.

Therefore, the subject-matter of claim 4 of the second auxiliary request does not involve an inventive step (Article 52(1) EPC and Article 56 EPC 1973).

3. Third auxiliary request - inventive step

3.1 Additional / modified distinguishing features

Claim 1 of the third auxiliary request differs from claim 4 of the second auxiliary request in

- relating to the embodiment of Figure 4B of the appli­­cation rather than the embodiment of Figure 6B,

- containing the additional features concerning

- a method of driving different display panel regions, and

- the structure of the power supply of the display panel regions.

Correspondingly, as pointed out in the decision under appeal (see point 3.3 of the Reasons) and agreed by the appellant, the subject-matter of claim 1 of the third auxiliary request differs from the method of document D3, the closest state of the art, in comprising (see point IV. above for the definitions of the features)

- features (j), (k), (l), (m), (n), (o), (p), (v), (w), (x), (y), (z), (aa), (ab),

- features (q), (s), (t), (u), (ac), (ad), and

- feature (r).

3.2 Objective technical problems

3.2.1 In the contested decision the examining division held (see points 3.4 to 3.6 of the Reasons) that the differ­ent groups of dis­tinguishing features related to sepa­rate technical problems, namely

- to provide an alternative pixel circuit,

- to ensure a suitable data voltage emission period for pixels in an OLED panel, and

- to improve uniformity in an OLED panel.

3.2.2 The appellant argued that the problems solved by the invention were the reduc­tion of brightness flicker as well as of the non-uniformity of the brightness.

3.2.3 The board notes that the second and third groups of distinguishing features defined under point 3.1 above relate to the driving and power supply of the various display panel regions, so that they are func­tionally inter­dependent and it is not appropriate to formulate par­tial problems in relation to them. More­over, the exam­ining division's formulation of the second group of features contains elements of the solu­tion, which is inappropriate. On the other hand, the appellant's defini­tion of the corresponding problem (reduction of brightness flicker) is described in the description of the applica­tion (see page 21, lines 8-13) and is plau­sible. The objective technical partial prob­lems corre­sponding to the first group of distinguishing features on the one hand and to the second and third groups of features on the other hand is therefore

- to provide an alternative pixel circuit, and

- to reduc­e brightness flicker as well as the non-uniformity of the panel brightness.

3.3 Obviousness

3.3.1 The appellant argued that there was no explicit teach­ing in document D3 on how to drive the pixels. In par­tic­ular, page 14, paragraph 6 of D3 did not provide enough information and did not allow the skilled person to get to the claimed method. Moreover, document D6 did not disclose how the panel was driven.

3.3.2 Concerning the claimed solution of the first partial problem the board notes that the implementation of a pixel circuit using n-MOS transistors with its basic arrangement of the addressing switching means, current con­trol means and capacitor is known to the skilled person from his common general knowledge, as illus­trated in Figure 8.14(B) of document D8. Furthermore, the board agrees with the examining division (see point 2.6 of the Reasons of the decision) in that the skilled person would contemplate the claimed circuit connection of the second switching means when attempting to pro­vide an alter­native to the pixel circuit of Figure 7 of docu­ment D3. He would thus arrive at the first group of distin­guish­ing fea­tures mentioned above under point 3.1 without exercising any inven­tive skills.

3.3.3 The skilled person would also consider sol­ving the second partial problem when starting from docu­ment D3 as the closest state of the art. Indeed, a non-uniform bright­ness distribution is explicitly mentioned as one of the problems to be addressed by the in­ven­tion of that docu­ment (see page 4, lines 9-31). It is also de­scribed that the image content should be programmed in a time which is short in comparison to the active time during which the image contents are displayed (page 14, lines 22-23). It is evident for the skilled person that this is to avoid any brightness flicker.

Moreover, as pointed out by the examining division in the decision under appeal (see point 3.7 of the Rea­sons), it is men­tioned in document D3 that the drive methods according to the invention of D3 could "also be used for parts or groups of rows or columns, and for parts of fields or frames. In situations such as these, the elements in the illuminated display are connected appropriately and jointly to a supply line or to a connecting network" (page 14, lines 28-31).

Ac­cording to one of these drive methods the entire image content is programmed into the signal retaining means during the programming phase after which the pro­cess switches to the operating phase (page 14, lines 14-16). When this method is used for each one of the various groups of rows it is evident for the skilled person that the program­ming phase is reduced compared to when all rows are pro­grammed before switching to the operating phase. Thus, the desired reduction of the brightness flicker is achieved. The claimed coordina­tion of the driving and programming phases of the vari­ous groups of rows (fea­tures (ac) and (ad)) is merely one of several pos­sibilities that the skilled person would adopt in order to implement the driving of such groups of rows.

The appropriate and joint connection to a power supply line of the groups of rows is already explicitly mentioned in document D3 as pointed out above. The claimed parallel arrangement of the connection is for the skilled person obvious in view of his common general knowledge when attempting to achieve a uniform brightness between the various groups of rows.

3.3.4 Consequently, the subject-matter of claim 1 of the third auxiliary request does not involve an inventive step (Article 52(1) EPC and Article 56 EPC 1973).

4. Conclusion

Since the main request and the first auxiliary request were not admitted into the proceedings and the subject-matter of claim 4 of the second auxiliary request and of claim 1 of the third auxiliary request does not involve an inventive step, the board confirms the deci­sion of the examining division refusing the appli­ca­tion. Therefore, the appeal has to be dismissed.

Order

For these reasons it is decided that:

The appeal is dismissed.