T 1201/13 () of 12.4.2018

Summary of Facts and Submissions

I. The appeal concerns the decision of the Examining Division refusing the European patent application No. 10 171 005 for lack of inventive step of the subject-matter claimed according to the former main request and the former auxiliary request (Article 56 EPC).

II. Reference is made to the following documents:

D1: EP 2 120 265 A,

D2: US 2008/0054798 A,

D4: US 6 376 896 B,

D5: EP 1 763 014 A,

D6: EP 1 355 354 A,

D7: GB 2 113 469 A.

III. At the oral proceedings before the Board the appellant (applicant) requested that the decision under appeal be set aside and a patent be granted on the basis of the following documents:

Description: pages 1 to 9 as filed during the oral proceedings before the Board,

Claims: 1-5 of the main request as filed during the oral proceedings before the Board,

Drawings: Figures 1-5 as originally filed.

IV. The wording of independent claims 1 and 4 of the main request (sole request) is as follows (Board's labelling "(i)", "(ii)", "(iii)", and "(iv)"):

"1. An organic light emitting display device comprising:

a pixel unit (110) comprising pixels (120) at crossing regions of scan lines (S1, S2, Sn) and data lines (D1, D2, D3, D3m-2, D3m-1, D3m);

a scan driving circuit (130) configured to supply scan signals to the scan lines (S1 , S2, Sn); and

a lighting test circuit (160) configured to supply lighting test signals to the data lines (D1, D2, D3, D3m-2, D3m-1, D3m),

the lighting test circuit (160) comprising a plurality of transistors (M1, M2, M3, Mm-2, Mm-1, Mm), the plurality of transistors comprising source electrodes (168), drain electrodes (166), and gate electrodes (164), the source electrodes (168) being

coupled, in common, to an input line (TD) to which the lighting test signals are input, the drain electrodes (166) being coupled to the data lines (D1, D2, D3, D3m-2, D3m-1, D3m), the gate electrodes (164) being coupled, in common, to an input line (TG) of test control signals, and

(i) the gate electrodes (164) and the source electrodes (168) being coupled through a resistor (R) composed of a semiconductor material,

wherein

(ii) the resistor (R) is integral with a channel layer (Ch) of the transistors (M1, M2, M3, Mm-2, Mm-1, Mm),

(iii) the resistor (R) has a resistance value of 100 kOmega to 1 MOmega, and

(iv) wherein the resistor (R) is composed of a high-resistance polysilicon semiconductor."

"4. A method of fabricating an organic light emitting display according to one of claims 1 through 3, comprising:

forming a lighting test circuit (160) in a mounted region (150) configured to host a driving integrated circuit (180),

wherein the resistor (R) is formed integrally with the channel layers (Ch) of the transistors (M1, M2, M3, Mm-2, Mm-1, Mm) of the lighting test circuit (160)."

V. The appellant argued essentially as follows in relation to inventive step:

Document D5 represented the closest state of the art as it was concerned with the same purpose as the claimed invention. Claim 1 was distinguished from document D5 in that a resistor coupled the source and gate electrodes of the transistors of the lighting test circuit, the resistor being integral with a channel layer of the transistors, and the resistor having a resistance value of 100 kOmega to 1 MOmega.

The distinguishing features were interrelated and had the technical effect of enabling efficient manu­fac­ture of an organic light emitting display device with elec­tric discharge protection during and after manu­facture. It was the objective technical problem to achieve this effect.

From the disclosure of document D5 the skilled person had no motivation to consider electrostatic damage pro­tection as it followed from paragraph [0061] of D5 that static electricity noise did not pose a problem. Fur­ther­more, the skilled person would not have considered document D6 for solving the objective technical prob­lem, as that document related to a medium to high power MOSFET, which was not the type of transistor, namely a thin film transistor, used in the organic light emitting device according to the present invention. It was not evident for the skilled person that the technical solution of document D6 was applicable to any other kind of transistor. Moreover, when it was mentioned in D6 that the resistor was formed of the polycrystalline silicon material, such material could not be part of the gate channel layer of the standard MOSFET of D6, but only of the gate electrode. In fact, the skilled person might consider connecting various pads of the display device of document D5 via bleed resistors R as shown in Figure 2 of D2. However, these resistors were outside the scribing lines and did not solve the problem of the present invention. The claimed subject-matter involved an inventive step.

Reasons for the Decision

1. Amendments

1.1 During the appeal proceedings the claims were amended in relation to the claims of the auxiliary request underlying the decision, in that features (iii) and (iv) were added and in that any indication in relation to the presence of impurities in the polysilicon material of the resistor was deleted.

1.2 No subject-matter extending beyond the original appli­ca­tion documents was added by the amendments. In fact, independent claims 1 and 4 are based on claims 1-4 and 9 as originally filed. Dependent claims 2, 3, and 5 are based on original claims 7, 8, and 10, respectively. The description has been brought into conformity with the amended claims and supplemented with an indication of the relevant content of the prior art without exten­ding beyond the content of the application as filed.

Accordingly, the Board is satisfied that the amendments comply with the requirements of Article 123(2) EPC.

2. Novelty

2.1 Lack of novelty was not an issue in the decision under appeal. Indeed, none of the known documents of the state of the art under Article 54(2) EPC, in particular documents D2 and D5, discloses features (i) to (iv) of claim 1.

Accordingly, the subject-matter of independent device claim 1 and hence also that of the corresponding method claim 4 and of dependent claims 2, 3, and 5 is new over these documents.

2.2 Moreover, the Board could establish that - in view of the translation of the priority document filed by the appellant - the pri­or­ity claim of the present applica­tion is valid for the claimed sub­ject-matter so that the priority date counts as the fil­ing date for the purpose of Article 54(3) EPC (Article 89 EPC). As the European patent applica­tion D1 has a filing date (14 May 2009) before the priority date of the present appli­cation (2 Sep­tember 2009) and a pub­lication date (18 Novem­ber 2009) after the priority date, this applica­tion D1 is comprised in the state of the art under Article 54(3) EPC.

Document D1 discloses an organic light emitting display device comprising a pixel unit (display unit 100; see paragraph [0023]), a scan driving circuit (scan driver 300; see paragraph [0025]), a lighting test circuit comprising a plurality of transistors (signal transfer unit including a plurality of transistors 210a; see paragraph [0030]), the gate electrodes and the source electrodes of the transistors being coupled through a resistor composed of a semiconductor material (protec­tion unit 210b; see paragraph [0043]).

However, there is no indication in document D1 con­cerning the resistance value of the protection unit 210b. In particular, it has not been disclosed in document D1 that the protection unit 210b has a resis­tance value of 100 kOmega to 1 MOmega.

Consequently, the subject-matter of independent device claim 1 and hence also that of the corresponding method claim 4 and of dependent claims 2, 3, and 5 is new over document D1.

2.3 In view of the above, the subject-matter of claims 1 to 5 is new (Articles 52(1) and 54(1) EPC).

3. Inventive step

3.1 Closest state of the art

In the decision under appeal the Examining Division considered document D5 the closest state of the art, an opinion shared by the appellant. Indeed, document D5 discloses subject-matter that is conceived for the same purpose as the claimed invention, namely for providing an organic light emitting display comprising a pixel unit, a scan driving unit and a lighting test circuit, and has the most relevant technical features in common with it, as detailed below. Document D5 is therefore regarded as the closest state of the art.

3.2 Distinguishing features

3.2.1 The appellant is of the opinion that the subject-matter of claim 1 differs from the device of document D5 in comprising features (i) to (iv). This is in line with the opinion expressed by the Examining Division in the decision under appeal in relation to the former auxiliary request (see point 5.2 of the Reasons).

3.2.2 Indeed, document D5 discloses (see paragraphs [0045]-[0056] and [0138]-[0145]; Figures 1-3 and 7) a mother­board 200 com­prising a plurality of organic electro-luminescence displays 210 (OELDs). Each OELD 210 has a scan driving unit 220, a test unit 230, a data distri­bu­tion unit 240, a pixel unit 250 comprising a plu­ral­ity of pixels including organic light emitting diodes, and first and second wire groups 260 and 270. The scan driving unit 120 generates scanning signals which are sequentially supplied to scanning lines S1 to Sn. The data distribu­tion unit 140 supplies the data signals to data lines D1 to D3m. The test unit 230 re­ceives the test control signal and test signals from the first wire group 260 and/or the second wire group 270. The test signals, which test whether or not de­fects in the OELD are present, can include, lighting test signals, aging test signals and leakage current test signals and other test signals of the pixels in­cluded in the pixel unit 250. The test unit 230 has a plurality of tran­sistors M1 to Mm, e. g. PMOS transistors. The gate elec­­trodes and the first electrodes of the plurality of tran­sistors M1 to Mm are connected to test control signal lines 263a and test signal lines 263b, respec­tively, which are both included in the first wire group 260. The test control signals TEST_GATE are supplied to the transistors M1 to Mm from the test control signal line 263a to turn on the transistors M1 to Mm. If the transistors M1 to Mm are turned on, then the test signals TEST_DATA supplied to the test signal line 263b are supplied to the output lines and subsequently to data lines D1 to D3m via the data distribution unit 240 for testing whether the pixels are functioning.

Hence, using the wording of claim 1, document D5 dis­closes an organic light emitting display device (OELD 210) comprising:

a pixel unit (250) comprising pixels at crossing regions of scan lines (S1 to Sn) and data lines (D1 to D3m);

a scan driving circuit (scan driving unit 220) configured to supply scan signals to the scan lines (S1 to Sn); and

a lighting test circuit (test unit 230) configured to supply lighting test signals to the data lines (D1 to D3m),

the lighting test circuit (test unit 230) com­prising a plurality of transistors (M1 to Mm), the plurality of transistors (being PMOS transistors) comprising source electrodes, drain electrodes, and gate electrodes, the source electrodes being coupled, in common, to an input line (test signal line 263b) to which the lighting test signals (TEST_DATA) are input, the drain electrodes being coupled (via the data distribution unit 240) to the data lines (D1 to D3m), the gate electrodes being coupled, in common, to an input line (test control signal line 263a) of test control signals (TEST_GATE).

3.2.3 There is no disclosure in document D5 regarding a resistor coupling the gate and source electrodes of the transistors M1 to Mm of the test unit 230. Hence, the Board agrees with the appellant in that the sub­ject-matter of claim 1 differs from the device of document D5 in comprising features (i) to (iv).

3.3 Objective technical problem

3.3.1 In the decision under appeal the Examining Division held that the distinguishing features of claim 1 of the former auxiliary request were merely juxtaposed so that partial objective problems had to be formulated corre­sponding to these features (see points 4.4-4.6 and 5.2.1-5.2.3 of the Reasons).

3.3.2 The appellant argued that the distinguishing features were interrelated and had the technical effect of enabling efficient manu­fac­ture of an organic light emitting display device with electric discharge protection during and after manu­facture.

3.3.3 In the Board's view features (i) to (iv) are all re­lated to the resistor coupling the source and gate elec­trodes of the transistors. These features are there­fore related to the same structure and are func­tionally interdependent so that it is inappropriate to formulate partial problems in relation to them (see Case Law of the Boards of Appeal of the EPO, 8th edition 2016, section I.D.9.2.2). Rather, one single objective technical problem has to be formulated in view of their common technical effect.

The Board notes that the claimed resistor couples the gate and source electrodes of the tran­sis­tors of the lighting test circuit, thereby providing elec­­tric discharge protection of that specific circuit (see the present version of the descrip­tion of the application, par­a­graph [0048]). Moreover, the integral arrangement of the resistor, which is made of polysilicon material, and the channel layer of the transis­tors indeed allows the organic light emitting display device to be manu­factured efficiently (ibid., paragraph [0041]). Hence, features (i) to (iv) have the com­bined technical effect of enabling the efficient manu­fac­ture of an organic light emitting display device with electric discharge protection of the lighting test circuit during and after manu­facture. It is therefore the objective tech­nical problem of the invention to achieve this effect.

3.4 Obviousness

3.4.1 In the decision under appeal the Examining Division held (see points 4.5, 4.6, and 5.2.3 of the Reasons) that the problem of damage to transistors due to electrostatic discharge was widely known from the prior art and also acknowledged in document D5 (paragraph [0061]). Document D6 disclosed the claimed solution, namely a protection resistive element formed in the semiconductor layer, e. g. a poly­-crys­talline silicon layer (D6, paragraph [0006]). In relation to the use of polysilicon for implementing resistors integrated within a circuit in which that material is used for other devices the Examining Division also referred to documents D4 and D7.

3.4.2 In paragraph [0061] of document D5, which was referred to by the Examining Division, the following is stated:

"Each OELD 210, which is formed on the motherboard 200, is scribed after the sheet unit tests have been completed. The scribing lines 280 are arranged so that the scan driving unit 220, the test unit 230, the data distribution unit 240 and the pixel unit 250 are electrically isolated from the first wire group 260 and the second wire group 270 after the OELD 210 has been scribed. [...] Therefore, noise, such as static electricity, which is input to the first wire group 260 and the second wire group 270 from the outside is not supplied to the scan driving unit 220, the test unit 230, the data distribution unit 240 and the pixel unit 250."

The skilled person would thus understand from this passage that - after completion of the sheet unit tests and the sub­sequent scribing of the OELDs 210 - any static elec­tricity which might be input to the first and sec­ond wire groups 260 and 270 is not transmitted to the various com­ponents of the OELDs 210. However, in the Board's opinion the skilled person would not deduce from this statement or any other part of document D5 that static electricity might constitute a problem before the scribing of the OELDs 210, i. e. during the manu­facture of the motherboard or during the sheet unit tests. Rather, the skilled person would regard the manu­­facture of the motherboard and the sheet unit tests as entirely distinct from any potential subsequent hand­ling of the mother­board 200 requiring a separate set of precautions. Therefore, the dis­closure of docu­­ment D5 would not lead the skilled person to con­sid­ering electric discharge protection of the test units 230 of the OELDs 210 during the manufacture of the motherboard or the execution of the tests. Since the test units 230 are merely used tempo­rarily for per­forming the sheet unit tests, his common general knowledge would not - in the Board's judgment - lead the skilled person to contem­plating such protec­tion, either.

In the present case the recognition of the objective technical problem is therefore considered as contri­buting to the merits of the invention in relation to inventive step.

3.4.3 Even when supposing, for the sake of the argument, that the above objective technical problem had been recognized, the skilled person would not have been led to the claimed solution for the following reasons.

3.4.4 Document D6 relates to (see paragraphs [0001], [0004], [0006], and [0017]) a metal oxide semiconductor field effect transistor (MOSFET) which is electrically pro­tected against elec­tro­static build up and discharge. The object of that document is to eliminate the need for elec­trostatic handling and packaging precautions as well as to protect the MOSFET during assembly, e. g. in case of short circuits occurring during mounting such MOSFETs on an electronic circuit. This is achieved by arranging a resistance connected between the gate node and the source node of the MOSFET which provides a con­tinuous discharge path for electric charges that are accumulated on a gate-source capacitance so that there is no voltage build up and thus little likelihood of destruction of the MOSFET due to electrostatic dis­charge. In particular, a power MOSFET device is dis­closed with an integrated resistor 5 which is elec­trically connected to the gate node 3 and source node 1 of the MOSFET. The resistor is implemented as part of the monolithic process during the fabrication of the MOSFET itself and has an impedance of 5 kOmega.

Document D6 is thus concerned with avoiding voltage build up which might occur during the handling of an individual MOSFET device when it is packaged or mounted on an electronic circuit. The document is thus not con­cerned with electric discharge protection of a circuit during its manu­facture and would not be consulted by the skilled person when attempting to solve the posed objective technical problem. Moreover, in D6 there is no disclosure of a polysilicon channel layer as implied by the combination of features (ii) and (iv) of claim 1 and the resistance value of the resistor of document D6 is an order of magnitude smaller than the lower limit of the range claimed according to feature (iii) of claim 1. The combination of the features of the devices of documents D5 and D6 would therefore not lead to the claimed subject-matter, either.

3.4.5 When arguing that the skilled person would not be led to the claimed invention the appellant stated that the skilled person might, in fact, consider connecting various pads of the display device of document D5 via bleed resistors R as shown in Figure 2 of document D2.

Document D2 relates to (see paragraphs [0038]-[0040] and Figure 1) an organic light emitting display device with pixel portion 230, scan driver 220 and test sec­tions 240 and 260 of the same type as the display device of docu­ment D5. However, the resistors referred to by the appellant serve the purpose of preventing an electric current from flowing through an abnormal path when a test is performed (see D5, paragraph [0114]). More­over, the resistance value of the resistors is about two orders smaller than the lower limit of the range claimed according to feature (iii) of claim 1. The other features concerning the claimed resistor as specified in features (i), (ii), and (iv) have not been disclosed in document D2, either. The skilled person would thus neither consult document D2 for solving the posed problem nor arrive at the claimed subject-matter by combining the features of D2 and D5.

3.4.6 Documents D4 and D7 were cited by the Examining Division merely in relation to the use of polysilicon for implementing resistors integrated within a circuit in which that material is used for other devices. However, these documents neither address the posed objective technical problem nor disclose the claimed solution.

3.4.7 In the Board's view common general knowledge would not lead the skilled person to the claimed invention, either.

3.4.8 In view of the above the subject-matter of claim 1 involves an inventive step. Independent method claim 4 corresponds essentially to device claim 1. Claims 2-3 and 5 are dependent on claims 1 and 4, respectively.

Accordingly, the subject-matter of claims 1 to 5 in­volves an inventive step (Articles 52(1) and 56 EPC).

4. Conclusion

For the above reasons the Board is of the opinion that the application and the invention to which it relates, in the version according to the appellant's sole request, meet the requirements of the EPC. Hence, a patent is to be granted on the basis of that version (Articles 97(1) and 111(1) EPC).

Order

For these reasons it is decided that:

1. The decision under appeal is set aside.

2. The case is remitted to the department of first instance with the order to grant a patent with the following documents:

Description: pages 1 to 9 as filed during the oral proceedings before the Board,

Claims: 1-5 of the main request as filed during the oral proceedings before the Board,

Drawings: Figures 1-5 as originally filed.