T 1769/09 () of 10.2.2014

Summary of Facts and Submissions

I. The appeal concerns the decision of the examining division to refuse European patent application No. 98 941 794 for lack of novelty within the meaning of Article 54(1) and (2) EPC 1973 in view of the following document:

D1: EP 0 797 257 A2.

II. The appellant requested in writing that the decision under appeal be set aside and that a patent be granted in the following version:

- claims 1 to 7 as filed with letter dated February 14, 2013;

- description pages 6 and 6a as filed with letter dated November 11, 2013;

- description pages 7, 8, 16 and 17 as filed with letter dated February 14, 2013;

- description pages 1 to 5 and 9 to 15 as originally filed;

- drawing sheets 1/6 to 6/6 as originally filed.

III. The wording of independent claim 1 reads as follows (labelling “(a)”, “(b)”, “(c)” by the board):

“1. A semiconductor device comprising:

- a first region (3) composed of a first conductor;

- a second region (1, 2) composed of a second conductor formed on top of the first region;

- a third region (4) composed of the first conductor formed on top of the second region; and

- a fourth region (5) composed of the second conductor formed on top of the third region;

wherein the second region (1, 2) comprises a depletion-layer forming auxiliary layer (1e, 1f) having a short lifetime and formed in the vicinity of the third region (4); a tail-current suppression layer (1b) having a shorter lifetime than that of the depletion-layer forming auxiliary layer (1e, 1f) and formed in the vicinity of the first region (3); and a depletion-layer forming suppression layer (1d, 1c) having a longer lifetime than that of the depletion-layer forming auxiliary layer (1e, 1f) and formed between the depletion-layer forming auxiliary layer (1e, 1f) and the tail-current suppression layer (1b),

characterised in that

(a) the depletion-layer forming suppression layer (1d,

1c) is provided by two further sub-layers,

(b) a first sub-layer (1d) formed adjacent the

depletion-layer forming auxiliary layer (1e, 1f)

and a second sub-layer (1c) formed adjacent the

tail-current suppression layer (1b)

(c) wherein the lifetime of the first sub-layer (1d)

is shorter than that of the second sub-layer

(1c).”

IV. The appellant argued essentially as follows:

The lifetime of carriers in the upper layer 11 of document D1 was higher than the lifetime of carriers in the lower layer 11. This corresponded to what was defined in claim 1. However, one would expect the increased dose of the ion implantation in the lower region 11 to lead to the sub-layer of the central region 101 next to the lower layer 11 having a lifetime which was lower than that of the sub-layer of the central region 101 next to the upper layer 11. That was the exact opposite of the teaching of claim 1.

The subject-matter of claim 1 was thus new.

There were no suggestions in document D1 to control the spike voltage by means of increasing a damaged layer depth. In particular, the skilled person would not have been motivated by page 3 of document D1 to amend the damaged layer depth.

Therefore, the claimed subject-matter involved an inventive step.

Reasons for the Decision

1. Admissibility

The appeal is admissible.

2. Amendments

Independent claim 1 is based on original claim 1 and on the original description (page 12, lines 4-24).

Dependent claims 2 to 7 are based on original claims 2 and 4 to 8 and on the original description (page 14, lines 27-30). The description has been brought into conformity with the amended claims without extending beyond the content of the application as filed.

Accordingly, the board is satisfied that the amendments comply with the requirements of Article 123(2) EPC.

3. Novelty

3.1 Document D1

3.1.1 Document D1 discloses (see Figures 1-3 and 10; page 7, line 23 – page 8, line 15; page 12, lines 14-37) a thyristor 100 comprising an anode electrode 105 and a P**(+) diffusion layer 102, an N**(-) silicon substrate 101, and a P diffusion layer 103 provided sequentially on the anode electrode 105. A gate electrode 107 is provided on the centre of the P diffusion layer 103. An N**(+) diffusion region 104 is formed in a surface of the P diffusion layer 103 so as to surround the P diffusion layer 103 provided under the gate electrode 107. A cathode electrode 106 is provided on the surface of the P diffusion layer 103 so as to surround the gate electrode 107.

Furthermore, it is described in D1 that the lifetime of a minority carrier is controlled by the use of ion implantation. Implantation regions 11 are formed by the use of a heavy ion beam 10 which is irradiated onto the thyristor 100. The implantation regions 11 are formed in the N**(-) silicon substrate 101 on its cathode side and on its anode side. The depth of an implantation region 11 is determined by the selected accelerating energy of the ions. In the implantation regions 11 the crystalline properties are damaged so that crystal defects are generated. Consequently, the lifetime of minority carriers is shortened and the rate at which the minority carriers can pass through the region is reduced.

In the embodiment shown in Figure 3 shielding members 110 and 120 with a plurality of openings HL are used in order to partially block the ion beam so that non-implantation regions 12 are formed between the implantation regions 11. In the embodiment of Figure 10 no shielding members are used so that the ion implantation region 11 is formed over the whole area at the depth corresponding to the accelerating energy. Furthermore, it is disclosed in relation to that embodiment that the amounts of ions PhiK and PhiA irradiated from the cathode and anode sides, respectively, may have a ratio within the range of 0.5 : 1 to 1 : 1 (page 12, lines 39-54).

3.1.2 In the decision under appeal the examining division had argued that the subject-matter of the preamble of claim 1 had been disclosed in document D1. This has not been contested by the appellant.

Indeed, using the wording of claim 1 document D1 discloses in relation to the embodiment of Figure 10 a semiconductor device (thyristor 100) comprising:

- a first region (P**(+) diffusion layer 102) composed of a first conductor (P);

- a second region (N**(-) silicon substrate 101) composed of a second conductor (N) formed on top of the first region (P**(+) diffusion layer 102);

- a third region (P diffusion layer 103) composed of the first conductor (P) formed on top of the second region (N**(-) silicon substrate 101); and

- a fourth region (N**(+) diffusion region 104) composed of the second conductor (N) formed on top of the third region (P diffusion layer 103);

wherein the second region (N**(-) silicon substrate 101) comprises a depletion-layer forming auxiliary layer (cathode side implantation region 11) having a short lifetime (of minority carriers) and formed in the vicinity of the third region (P diffusion layer 103); a tail-current suppression layer (anode side implantation region 11) having a shorter lifetime (of minority carriers) than that of the depletion-layer forming auxiliary layer (cathode side implantation region 11) and formed in the vicinity of the first region (P**(+) diffusion layer 102) (due to a higher ion beam irradiation on the anode side when the ratio of PhiK to PhiA is 0.5 : 1); and a depletion-layer forming suppression layer (N**(-) silicon substrate 101 between the cathode and anode side implantation regions 11) having a longer lifetime than that of the depletion-layer forming auxiliary layer (cathode side implantation region 11) and formed between the depletion-layer forming auxiliary layer (cathode side implantation region 11) and the tail-current suppression layer (anode side implantation region 11).

3.1.3 In the decision under appeal the examining division was of the opinion that ‘adjacent’ meant that the concerned layers were “not necessarily touching”. This corresponded to the common meaning of the term and to the definition of the sub-layers in the application. Referring to Figures 16 and 17 of document D1, the examining division held that the region immediately below the peak of the depletion layer forming auxiliary layer could be regarded as the first claimed sub-layer and the layer immediately below that layer could be regarded as the second claimed sub-layer. This layer had a constant lifetime, which was greater than the lifetime of the region identified as the first sub-layer. Therefore, the characterizing features (a), (b), and (c) of claim 1 were also disclosed in document D1.

3.1.4 In the description of the invention it is mentioned (see page 12, line 25 – page 13, line 9) that comparatively heavy ions are irradiated from the anode side before the anode electrode is formed in order to form the layers whose lifetime differ from one another. The ions stop at a certain range determined by the accelerated energy. Even though a very small amount of crystal defects is formed in the region where the ions have passed through, a larger amount of crystal defects is increasingly formed as one comes closer to the range so that a considerable amount of crystal defects are partially formed in the area where the ions stop.

In the claimed invention the following layers fall under the category of layers whose lifetime differ from one another: the depletion-layer forming auxiliary layer, the tail-current suppression layer, the depletion-layer forming suppression layer being provided by a first and a second sub-layer. When constructing the term ‘layer’ in this context the skilled person would take into consideration the manner in which these layers are formed. In particular, he would regard as part of one layer the region in which a large amount of crystal defects are formed where irradiating ions stop in accordance with their acceleration energy.

In the device of document D1 the lifetime of the minority carriers is also controlled by use of a heavy ion beam where the depth of an implantation region is determined by the selected accelerating energy (see point 3.1.1 above). According to the above understanding of the term ‘layer’ the skilled person would regard the region immediately below the peak of the depletion layer forming auxiliary layer as still belonging to the depletion layer forming auxiliary layer, rather than to a distinct other layer.

3.1.5 Furthermore, in the description it is described in relation to mode 1 of the invention (see page 9, line 29 – page 10, line 2) that the layer 1b is a tail-current suppression layer “in the vicinity” of an N region 2 and the layer 1a is a peak-voltage suppression layer “adjacent” to the N region 2. From Figure 1 it is evident that the layer 1a is adjoining the N region 2, whereas the layer 1b is not adjoining the N region 2 since the layer 1a is formed between the layer 1b and the N region 2. In accordance with this usage the term ‘adjacent’ in claim 1 would therefore be understood by the skilled person to imply that the concerned layers are adjoining each other, which is also considered by the board to conform with the usual meaning of the term. The examining division’s interpretation of the term ‘adjacent’ is therefore considered to be inappropriate and to correspond rather to the expression ‘in the vicinity’ as used in the application.

Therefore, even if – in accordance with the examining division’s opinion - the region immediately below the peak of the depletion layer forming auxiliary layer could be considered as the claimed first sub-layer, then a consistent reading of claim 1 would require the region immediately above the tail-current suppression layer to be considered as the second sub-layer. The board agrees with the appellant’s opinion that the lifetime of the first sub-layer would then be longer than that of the second sub-layer, because the lifetime of the depletion layer forming auxiliary layer is longer than that of the tail-current suppression layer. This is however contrary to what is claimed in the characterizing portion of claim 1.

3.1.6 For these reasons the characterizing features (a), (b), and (c) are not disclosed in document D1. The subject-matter of claim 1 is therefore new over document D1.

3.1.7 The other prior art documents on file are not closer to the subject-matter of claim 1 than document D1. Claims 2 to 7 are dependent on claim 1.

Accordingly, the subject-matter of claims 1 to 7 is new (Article 52(1) EPC and Article 54(1) EPC 1973).

4. Inventive step

4.1 Closest state of the art

Document D1 is conceived for the same purpose as the invention and has the most relevant technical features in common with it. Document D1 is therefore regarded as the closest state of the art.

4.2 Difference features / objective technical problem

The subject-matter of claim 1 differs from the device of document D1 in comprising the characterizing features (a), (b) and (c). The effect of these features is to suppress a spike voltage more effectively at the turn-off operation (see page 6, lines 2-4, and page 6, line 26 to page 7, line 7 of the description of the application). The objective technical problem is thus to achieve that effect.

4.3 Obviousness

In the appealed decision the examining division expressed as an additional remark the opinion that spike voltage control was mentioned in D1 suggesting that damage layer depth should be increased to reduce spike voltages.

However, in document D1 spike voltages are merely mentioned in relation to the prior art “Document 2” cited in D1 (see D1, page 3, lines 25-33). In that document crystal defects are created in a single layer at a range position D||. It is reported that as the range position is increased, the spike voltage applied during turn-off tends to be decreased but the energy loss tends to be increased. By contrast, in the device according to the invention of D1 two implantation regions at different positions are used in order to reduce the ON-state voltage and the tail-current (D1, page 5, lines 14-19).

It is therefore not mentioned in D1 in relation to “Document 2” that a first and second sub-layer are used having the claimed relationship regarding their lifetimes. The difference features (a), (b), and (c) are therefore not known from “Document 2”.

Furthermore, it is neither evident for the skilled person nor is there any indication in document D1 that the effect of the crystal defect layer at range position D|| on the spike voltage persists in the presence of other layers with crystal defects.

Moreover, the other documents on file do not contain any teaching which would lead the skilled person in an obvious manner to the claimed subject-matter.

4.3.1 Therefore, the subject-matter of claim 1 involves an inventive step. Claims 2 to 7 are dependent on claim 1.

Accordingly, the subject-matter of claims 1 to 7 involves an inventive step (Article 52(1) EPC and Article 56 EPC 1973).

5. Other requirements of the EPC and conclusion

In order to comply with the requirements of Article 84 EPC 1973 and Rule 27(1)(b) EPC, the description has been brought into conformity with the amended claims and supplemented with an indication of the relevant content of the state of the art.

In view of the above the sole request is allowable.

Order

For these reasons it is decided that:

1. The decision under appeal is set aside.

2. The case is remitted to the department of first instance with the order to grant a patent in the following version:

- claims 1 to 7 as filed with letter dated February 14, 2013;

- description pages 7, 8, 16 and 17 as filed with letter dated February 14, 2013;

- description pages 6 and 6a as filed with letter dated November 11, 2013;

- description pages 1 to 5 and 9 to 15 as originally filed;

- drawing sheets 1/6 to 6/6 as originally filed.