T 1826/07 (Optimizing PLL phase noise characeristics/SAMSUNG) of 5.5.2010

Summary of Facts and Submissions

I. This appeal is against the decision of the examining division dispatched 6 June 2007, refusing European patent application No. 01124982.8 based on an objection under Article 56 EPC 1973 in the light of publication:

D1: EP 0693835 A2.

II. The notice of appeal was received on 16 August 2007. The appeal fee was paid on the same day. The appellant requested that the decision be set aside and that a patent be granted on the basis of claims 1 to 7 submitted with the statement setting out the grounds of appeal received on 16 October 2007. Further, oral proceedings were requested as an auxiliary measure.

III. A summons to oral proceedings to be held on 5 May 2010 was issued on 3 February 2010. In an annex accompanying the summons the board expressed the preliminary opinion that the subject-matter of independent claim 1 was considered obvious (Article 56 EPC 1973) in the light of the disclosure of D1 when combined with the skilled person's common general knowledge. Furthermore, dependent claim 4 did not fulfil the requirements of Article 84 EPC 1973. The board gave its reasons for the objections and why the appellant's arguments were not convincing.

IV. With a letter dated 1 April 2010 the appellant filed two sets of amended claims according to a new main request and an auxiliary request, replacing the previous request.

V. Oral proceedings were held on 5 May 2010 in the course of which the appellant's representative presented arguments in favour of an inventive step of the main request and the auxiliary request.

VI. Independent claim 1 of the main request reads as follows:

"1. A method of optimizing PLL phase noise characteristics where the gap between a transmission burst period and a reception burst period is shorter than a required time period to lock up a PLL block, in a mobile terminal having a first PLL block (18) for generating a transmission local oscillation signal and a second PLL block (28) for generating a reception local oscillation signal, in a communication system using a multi time slot mode, comprising:

instructing the first PLL block at a point of time (t1) within a reception burst period (32) to lock up within a time period (P1) required for the first PLL block before the start point (St) of a transmission burst period (30), the transmission burst period succeeding the reception burst period with a gap therebetween that is shorter than the required time period to lock-up the first PLL block, and

instructing the second PLL block at a point of time (t2) within the transmission burst period (30) to lock up within a time period (P2) required for the second PLL block before the start point (Sr) of a next reception burst period (32), the next reception burst period succeeding the transmission burst period with a gap therebetween that is shorter than the required time period to lock-up the second PLL block."

VII. Independent claim 1 of the auxiliary request further specifies:

"wherein the generated transmission local oscillation signal is applied by a transmitter of the mobile terminal and the generated reception local oscillation signal is applied by a receiver of the mobile terminal, wherein said transmitter is disabled in a non-transmission burst period and said receiver is disabled in a non-reception burst period."

VIII. The appellant requested that the decision under appeal be set aside and that a patent be granted on the basis of the main request (claims 1 to 7) or the auxiliary request (claims 1 to 6) filed with letter dated 1 April 2010.

IX. After deliberation the board announced its decision.

Reasons for the Decision

1. Admissibility

The appeal complies with the provisions of Articles 106 to 108 EPC 1973, which are applicable according to decision J 0010/07, point 1 (see Facts and Submissions, point II above). Therefore the appeal is admissible.

Main request

2. Inventive step of claim 1 - Article 56 EPC 1973

Claim 1 is directed to a method of optimizing PLL phase noise characteristics, in contrast to all the previous independent claims which were directed to an apparatus for and a method of generating a transmission local oscillation signal and a reception local oscillation signal.

The board has doubts that the application supports directing the claim to a method of optimizing, since the invention as disclosed does not involve adjusting parameters and does not give a criterion to follow in order to achieve an optimized result. It would appear that the amendment rather than actually specifying a method of optimisation is actually trying to put an alleged effect into the claim, rather than specifying the steps necessary to achieve such an effect. The amendment therefore does not contribute to an inventive step.

2.1 The board agrees with the decision under appeal that, for the assessment of inventive step, the subject-matter of claim 1 differs from the teaching of D1 in

1) instructing the first PLL block at a point of time within a reception burst period,

2) the transmission burst period succeeding the reception burst period with a gap therebetween that is shorter than the required time period to lock-up the first PLL block,

3) instructing the second PLL block at a point of time within a transmission burst period, and

4) the reception burst period succeeding the transmission burst period with a gap therebetween that is shorter than the required time period to lock-up the second PLL block.

2.2 The examining division essentially argued that distinguishing features 1) and 3) on the one hand, and distinguishing features 2) and 4) on the other hand were considered two groups of aggregated features. The objective technical problem of features 2) and 4) was considered to be how to implement a multiple timeslot mode such as HSCSD or GPRS on the known two PLL circuit disclosed in D1. This could not be considered inventive, because the multiple timeslot mode itself dictated as a precondition of the problem to be solved, that the gap between reception and transmission bursts might be shorter than the required lock-up time for the PLL block.

With regard to distinguishing features 1) and 3), the examining division argued that no indication was given in the description what was the advantage of these features which, therefore, could not contribute to an inventive activity (see also page 13, last 2 paragraphs of the decision, additional comments).

2.3 In the grounds of appeal, the appellant inter alia argued that the objective problem to be solved was to increase the throughput of data in the event of transmission and reception of data (see page 3, paragraph 3). The appellant continued by alleging that, according to the invention, this problem was solved by narrowing an existing gap between burst periods. However, this is not a feature of claim 1 which does not specify any step of narrowing. According to the description in paragraph [0018] of the published application, a narrowed gap between TX and RX burst periods was a known consequence of multi-time slots used in a data frame. Hence, the board agrees with the examining division that the timing slots and gaps as represented by figure 5 of the present application are dictated by a respective standard that is to be implemented, e.g. HSCSD. The board further agrees that the timing diagram of figure 5 of the present application does not automatically lead to a higher throughput of data (see the minutes of the oral proceedings before the first instance, page 3, first paragraph). Hence, the problem formulated by the appellant cannot be considered to be the objective technical problem solved by the distinguishing features.

2.4 The board considers that the effect of features 1) and 3) with respect to the prior art background considered by the applicant is that a lock-up of the PLL for transmission TX and reception RX becomes possible also in case the gap between TX bursts and RX bursts becomes too short for using a single PLL, as described in the introductory portion of the present application. That is also why the board considers distinguishing features 1) to 4) not to be aggregated, but to be related to the same technical problem of how to implement a standard using multi-time slots in a data frame.

An essential key to this solution of the problem put forward in the original application according to claim 1 is the provision of two separate PLL blocks, one for TX bursts and a second for RX bursts. This key element, however, is known from D1 (see figures 1 and 11).

The objective problem is therefore not the problem originally put forward, nor is it the problem presently put forward by the appellant. The overall objective technical problem of claim 1 is considered to be to implement a standard using multi-time slots in a data frame (e.g. HSCSD).

2.5 Claim 1 does not require that the lock-up of the first PLL and the second PLL takes place repetitively. The board does not agree with the appellant's point of view presented during oral proceedings that claim 1 requires that the PLLs be locked-up repeatedly, because it specifies three consecutive burst periods, but takes this to indicate only that transmission bursts and reception bursts are alternating, as is the case in D1 (see e.g. figure 17). According to claim 1 it is sufficient that a lock-up is done once for TX and RX. In contrast to the prior art mobile communication system with a single PLL block for TX and RX, as described in the introductory portion of the application, which needs to repeatedly switch frequencies for TX bursts and RX bursts with the PLL block having to lock-up every time, this is no longer necessary in the case of using two separate PLL blocks for TX and RX according to claim 1 and as disclosed in document D1.

2.6 In document D1, a switching of frequencies is disclosed only with regard to the MAHO ("mobile assisted hand-off") operation for the reception PLL 5 (see figures 10, 15 and 17 of D1), with the lock-up time Lv which the reception PLL 5 requires for phase lock to the vacant channel, with the time for measurement for the vacant channel, with the time for the setting of the PLL data for the current channel and with the lock-up time which the reception PLL 5 requires for phase lock to the current channel. If the time for measurement for the current channel exceeds the above-mentioned stipulated times, then it is not possible to return to the current channel before the commencement of the current channel reception slot (e.g., the slot 4), and the reception of the current channel from the base station is no longer possible. The timing with which it is possible to return to the current channel is called MAHO timing. In figure 17E and in column 17 of D1, it is disclosed that during an idle slot 2 in the reception period, the frequency of PLL 5 is set to the vacant channel (t1, Mv) and afterwards to the current channel (t3, Mc). According to figure 17C there is a gap between transmission and reception. The teaching of D1 assumes that reception at the mobile terminal takes place in slot 4 of figure 17B (see column 17, line 44). Figure 17A shows that a transmission period takes place if the corresponding signal is high (see also figure 15A). The strobe signals STv and STc for setting the frequency of PLL 5 (with the respective lock-up times t1 and t3) are initiated during the low state of the signal in figure 17A, i.e. in the reception phase. In case of lock-up time t3, the lock-up process of the reception PLL 5 is finished during the transmission period (i.e. the signal of figure 17A is high), it is initiated only during the reception period. The appellant argued that this was in contrast to distinguishing feature 3) and D1 therefore taught away from the claimed invention. However, it has to be considered that the MAHO operation is a scenario that happens only under special circumstances and only effects the reception-PLL which has to switch frequencies. In normal operation according to the teaching of D1 there is no need to repeatedly change frequencies, neither for the transmission-PLL nor for the reception-PLL.

2.7 The board rules that the skilled person when trying to solve the overall objective technical problem of claim 1 to implement a standard using multi-time slots in a data frame (such as HSCSD), starting from a known mobile system with separate PLL blocks for TX and RX as disclosed as conventional in D1 (see the argument on page 12, last paragraph of the appealed decision), would not care about the length of a gap between the TX and RX burst periods at all, and would just start the respective PLL blocks early enough to have locked-up when the corresponding TX or RX oscillation signals are needed. In case the gap was narrower than the lock-up time, the skilled person would automatically end up with starting the TX-PLL block within the reception burst period according to feature 1) and with starting the RX-PLL block within the transmission burst period according to feature 3). This is considered to be a natural result within the routine practice of an ordinarily skilled person. There would be no need to use a faster single PLL instead when starting from D1 as closest prior art (in contrast to the appellant's argument on page 4, paragraph 3 of the statement setting out the grounds of appeal).

2.8 Furthermore, the board does not follow the appellant's argument that the problem mentioned in D1 (column 16, lines 19 to 25) led the skilled person away from doing this and suggested to lock-up the PLLs in an idle slot, because this problem does not concern the strobe signals for lock-up timing of a PLL, but rather the problem of interference when transferring a value to the transmission PLL during a transmission slot, before the strobe is asserted. Even if this issue were considered to be relevant, the appellant has not identified any unexpected result of accepting the disadvantage mentioned in D1, so that doing so would not be inventive.

2.9 The appellant objected that the examining division did not provide any evidence that HSCSD actually required a narrowed gap between TX and RX bursts (see page 5, paragraph 4 of the statement setting out the grounds of appeal). The board makes the following observations. Firstly, the objective technical problem of how to implement a standard using multi-time slots in a data frame does not refer to the HSCSD standard directly, rather this standard was mentioned only as an example for the use of multi-slot standards, as was done in the application itself (see paragraphs [0006] to [0008] of the published application), therefore requiring a faster timing. Secondly, according to the description in paragraph [0018] of the published application, a narrowed gap between TX and RX burst periods was a known consequence of multi-time slots used in a data frame. Thus, the board does not think that any evidence for HSCSD is required. The appellant further argued that HSCSD did not provide a PLL locking immediately in front of each single burst. However, again this is not a feature of independent claim 1 (see also section 15 of the minutes of the oral proceedings before the first instance).

2.10 The board therefore considers features 2) and 4) to be a precondition set by the problem to implement a standard using multi-time slots in a data frame as described in paragraph [0018] of the published application (see also section 2.3 above), and features 1) and 3) to be obvious in the light of D1 under such a precondition. Claim 1 therefore lacks an inventive step (Art. 56 EPC 1973) over the disclosure of D1 combined with the skilled person's common general knowledge.

Auxiliary request

3. The appellant argued that the additional features of claim 1 of this request made clear that the transmission burst period was only for transmission and the reception burst period only for reception, so that there was no idle slot, which was in contrast to the teaching of D1.

3.1 However claim 1 does not exclude that there are possible idle slots when transmitter and receiver are both disabled. Therefore, the appellant's argument does not support claim 1. Even the application does not exclude that there are idle slots, they are just too short to lock-up in.

3.2 Furthermore, the board does not see how the additional features of claim 1 of this request contribute to optimizing PLL phase noise characteristics, to which claim 1 is directed.

3.3 In addition, the appellant did not present arguments to overcome the objections on page 13, last two paragraphs of the appealed decision, where it was argued that it was a standard feature of every TDMA system that a transmitter is not enabled at any time other than the transmit timeslot allocated to a user, which feature therefore also being implicit in D1. For the same reason each user only received during the receive timeslots allocated to him. The board is of the opinion that this objection has not been overcome by the appellant and therefore still applies.

The additional features of claim 1 of this request therefore do not add anything which involves an inventive activity. Thus, claim 1 still lacks an inventive step (Article 56 EPC 1973).

ORDER

For these reasons it is decided that:

The appeal is dismissed.