T 1598/07 (Electronically isolated transmission of logic signals/ANALOG DEVICES) of 4.1.2011

Summary of Facts and Submissions

I. This appeal is against the decision of the examining division, dispatched on 15 March 2007, refusing European patent application No. 01909157.8. The decision was based on the grounds that the independent claims of the main request lacked novelty (Articles 52(1) and 54(2) EPC 1973) having regard to the disclosure of

D1: US 4 538 136,

and that the independent claims of the first and second auxiliary requests lacked an inventive step (Article 56 EPC 1973) having regard to the disclosure of

D2: WO 99/21332 alone or in combination with D1 or

D3: FR 2 679 670.

II. The notice of appeal was received on 11 May 2007. The appeal fee was paid on the same day. The statement setting out the grounds of appeal was submitted on 24 July 2007. The appellant requested that the appealed decision be set aside and that a patent be granted based on the claims of the main request, the first auxiliary request, or the second auxiliary request, identical to the claims refused in examination, received by fax on 9 January 2007 and refiled with the statement setting out the grounds of appeal. Oral proceedings were requested on an auxiliary basis.

III. A summons to oral proceedings to be held on 4 January 2011 was issued on 22 October 2010. In an annex accompanying the summons the board expressed the preliminary opinion that the independent claims of the main request did not fulfil the requirements of

Article 54 EPC having regard to the disclosure of D1. Furthermore the board expressed the opinion that the independent claims of the main request did not fulfil the requirements of Article 56 EPC having regard to, inter alia, the disclosure of

D4: US 5 952 849, cited in the application.

The board also expressed the opinion that the independent claims of the first and second auxiliary requests did not add anything of inventive significance to the independent claims of the main request.

IV. With a letter of reply dated 3 December 2010, the appellant filed a third auxiliary request.

V. At the oral proceedings scheduled on 4 January 2011, the appellant requested that the decision under appeal be set aside and that a patent be granted on the basis of the main request (claims 1-26), filed as first

auxiliary request with letter dated 24 July 2007, or, subsidiarily, on the basis of the first auxiliary request (claims 1-26), filed as main request with letter dated 24 July 2007, or on the basis of the second auxiliary request (claims 1-26), filed as second auxiliary request with letter dated 24 July 2007, or on the basis of the third auxiliary request (claims 1-12) filed with letter dated 3 December 2010.

VI. Independent claim 1 according to the main request reads as follows:

"1. A method of operating a logic isolator circuit which comprises a transmitter, an isolation barrier, and a receiver integrated onto one or more semiconductor substrates, to transmit a logic signal across the isolation barrier comprising:

at the transmitter, receiving a logic signal that includes a first transition from a first state to a second state;

transmitting, from the transmitter to an isolation barrier, a first periodic signal representative of the first transition; and

at the receiver, receiving the first periodic signal from the isolation barrier and using the first periodic

signal to provide an output signal indicating the first transition."

Independent claim 14 according to the main request contains the same features as claim 1 according to the main request but expressed in terms of an apparatus claim for a logic isolator circuit.

VII. At the end of the oral proceedings the chair announced the board's decision.

Reasons for the Decision

1. Admissibility

1.1 The appeal complies with the provisions of Article 106 to 108 EPC 1973 (cf. Facts and Submissions, section II. above). Therefore it is admissible.

2. Novelty and inventive step - Articles 54 and 56 EPC

2.1 Prior art

D1 discloses a power line transmission system for transmitting a logic signal having two states (signal A, figure 3) from a transmitter to a receiver through a transformer (62, figure 2) coupled to a power line (15, figure 2). The transmitter generates a frequency shift keyed signal (XMT signal, figure 3) having a first predetermined frequency representing a first state of the logic signal and a second predetermined frequency representing the second state of the logic signal. The electrical components building the system are discrete components.

D2 discloses a logic isolator device (10, figure 1). The transitions of an input logic signal having two states (INPUT signal, figure 2) are transformed into magnetic pulses (RCVDC and RCVDD signals, figure 1; page 6, lines 1 to 6) by a magnetic field generator circuit (13, figure 1; page 5, lines 26 to 29) which are detected by a magneto- or giant magneto-resistive circuit (22, 24, 26 and 28, figure 1; page 5, lines 29 and 30 and page 3, lines 28 to 30) to recreate the input signal in a comparator (40, figure 1; page 6, lines 3 and 4). The entire structure (figure 1) may be formed monolithically as an integrated circuit on a single substrate (figure 5; page 7, lines 22 and 23).

D3 discloses a short range bilateral communications system between a reader/encoder and a magnetic or memory card e.g. credit card. It uses electromagnetic coupling to communicate power, data and clock signals to a card which responds by modulating the frequencies transmitted by the reader. The card comprises two flat coils (figure 1, references 3, 4) which, when inserted into the reader, correspond with two similar coils (figure 1, references 6, 7). The data signals for the card are transmitted by a radio frequency signal sent by the reader, alternately switching between its two coils. The card responds by a frequency modulated signal using two frequencies which are sub-multiples of the frequency emitted by the reader (figures 2, 3, "données", UL6, UL7 and FSK).

D4 discloses a logic isolation circuit wherein the states of an input logic signal (DATA IN signal,

figure 8) are transmitted as pulses (OUT signal, figure 8) across an isolation barrier (38, figure 2) provided by a link-coupled transformer (column 4, lines 56 to 61). Some components of the circuit may be formed as integrated circuits; however, the coils forming the isolation barrier are not integrated on a semi-conductor substrate (see column 9, lines 23 to 45 in relation with figure 9).

3. Main request:

3.1 Closest prior art:

The independent claims relate to a logic isolator circuit whose components (transmitter, isolation barrier, and receiver) are "integrated onto one or more semiconductor substrates". Since D1 relates to a system comprising a power line between the isolation barrier and the receiver, integration on semiconductor substrates is possible only on the transmitter side and/or on the receiver side. Therefore, the board judges that D1 cannot be considered as prior art closer than D2 to D4 to the subject-matter of independent claims 1 and 14.

Among documents D2, D3 and D4, only D2 and D4 relate to circuits for transmitting logical signals from a transmitter directly to a receiver through an isolation barrier and which are mainly used in control process systems. Of these two documents, D4 represents, in the board's view, the closest prior art since it discloses, as in one embodiment of the present application, the use of coils as an isolation barrier interposed between the transmitter and the receiver, whereas the single embodiment disclosed in D2 uses coils and magneto-resistive elements in association.

3.2 It was common ground during the oral proceedings that the differences between the subject-matter of the independent claims and the disclosure of D4 are that the transition of the logic signal is represented by a periodic signal instead of a single pulse and that the whole logic isolator circuit is integrated on one or more semiconductor substrates.

The technical effects of these differences are that the circuit is reduced in size and that the power content of the transmitted signal may be increased in comparison to a single pulse representation, by varying the number of periods of the signal.

Based on these technical effects, the objective technical problem can thus be formulated as how to achieve a reduction in size of the circuit while maintaining a high detection reliability.

The skilled person, starting from D4 and trying to solve this problem, would follow the technological trend and try to make the coils used for the isolation barrier smaller for integrating them on a semiconductor substrate. While doing this, he would however notice that the ratio of resistance to inductance of the transformer will increase and that the transformer may become more rapidly current-saturated. To avoid this, the skilled person would logically try to suppress the cause of saturation, namely the over-length of the pulse, by using a shorter pulse and increasing the sensitivity of the detection at the receiver. The skilled person would not get any hint from D4 to change the nature of the signal representing the transition from a single pulse to a periodic signal, and this all the more so since the transmitter circuit is only adapted to provide a single pulse in response to a falling or rising edge of the input signal (see column 4, lines 47 to 61).

The only available prior-art document disclosing the representation of logic signal transitions by a periodic signal is D1, which shows the transmission of multi-frequency shift keyed signals representing a logic input signal. D1 however relates to the field of power line transmission systems wherein the receiver is placed after the power line and therefore not to be integrated with the transmitter and transformer on a semiconductor substrate. Moreover the aim of using an isolation barrier in D1 is only to isolate the transmitter from surge currents originating from the power line noise (column 3, lines 32 to 35) whereas the aim of the isolation barrier in the application and in D4 is to prevent transient signals on the transmitter side from triggering erroneous signals at the receiver side.

The board therefore judges that the skilled person would be prevented from implementing the teaching of D1 in respect of a periodic signal representing a logic transition in the system of D4 because of the differences in the technical fields and because of the differences in the technical problems to be solved by this feature.

Further, D1 teaches that the inherent noise problem in power line communication can be significantly reduced if a narrow band signal is utilised instead of a wide band signal. Both the narrow band and wide band signals are periodic signals. Thus, the board judges that D1 does not provide any motivation for replacing a single pulse by a periodic signal.

Moreover, the appellant plausibly argued that transmitting a logic transition as a periodic signal allows the receiver to make a more reliable detection by virtue of the extended duration and power content of the signal, as opposed to a single pulse which has to be short in length to avoid saturation of the transformer. Therefore the board judges that using a periodic signal instead of a single pulse does not represent a mere alternative but rather involves in the present case a significant technical advantage.

For these reasons, the board judges that the subject-matter of independent claims 1 and 14 according to the main request involves an inventive step (Article 56 EPC) having regard to the prior-art documents on file.

Claims 2 to 13 and 15 to 26 are dependent claims and, as such, also meet the requirements of Article 56 EPC.

4. Auxiliary requests:

Since the main request is allowable, the first, second and third auxiliary requests do not need to be considered.

ORDER

For these reasons it is decided that:

1. The decision under appeal is set aside.

2. The case is remitted to the department of first instance with the order to grant a patent on the basis of the main request (claims 1-26), filed as first auxiliary request with letter dated 24 July 2007.