T 0138/07 (Remote data facility/EMC) of 17.6.2010

Summary of Facts and Submissions

I. This appeal is against the decision of the examining division to refuse European patent application No. 02021471.4.

II. The following documents will be referred to:

D1: WO-A-01/35244

D2: R. van Meter et al., "Task Force on Network Storage Architecture: Internet-attached storage devices", IEEE Proceedings of the Hawaii Int. Conf. on System Sciences, 8-10 January 1997, Wailea US, p. 726.

III. According to the appealed decision, the subject-matter of claim 1 of the then main request did not involve an inventive step over the prior art known from D1, and that of claim 1 of the then auxiliary request was not inventive over D1 taken in conjunction with D2.

IV. In the statement setting out the grounds of appeal, dated 28 November 2006, the appellant requested that the decision be set aside and a patent be granted based on the claims of the main request or one of the two auxiliary requests filed with the same letter. There was also a request for oral proceedings.

V. The Board informed the appellant in writing of its preliminary assessment of the appeal, which was that the decision under appeal was correct. It had to be regarded as self-evident that in order to improve the performance of a computer system either a more powerful processor was chosen or, as in accordance with the present invention, processors were added to take over some tasks. It was acknowledged in the application that TCP/IP operations were processing intensive. The Board could not see how it could have been inventive to allocate a processor to handle such operations. Thus the subject-matter of the main and first auxiliary requests did not appear inventive. As to the second auxiliary request it appeared inevitable that the two processors which had to communicate with each other shared some memory.

VI. By the letter dated 17 February 2010 the appellant withdrew its main request.

VII. Oral proceedings were held on 17 June 2010. The appellant requested that the decision under appeal be set aside and a patent be granted on the basis of the main request (former auxiliary request 1) or the auxiliary request (former auxiliary request 2) filed with the statement setting out the grounds of appeal dated 28 November 2006.

VIII. Claim 1 of the main request reads:

"In a remote data mirroring arrangement of data storage systems (14a, 14b, 14c), a method of operating a data storage system, comprising:

determining that storage traffic is to be transferred between the data storage system and a remote data storage system to which the data storage system is coupled by an IP network (52) in accordance with a remote data service application;

using an interface (108) between the remote data service application and a TCP/IP protocols software layer to form a connection to the IP network, wherein the interface is split across two processors (82, 84), with a first interface portion residing on a first processor associated with the remote data service application and a second interface portion residing on a second processor associated with the TCP/IP protocols software layer; and

enabling transfer of the storage traffic between the data storage system and the remote data storage system over the IP network using the connection to the IP

network".

IX. Claim 1 of the auxiliary request adds, as the penultimate feature, the feature "providing a shared memory (80), which contains inbound and outgoing data structures for managing the transfer of messages and data between the first interface portion and the second interface portion".

Reasons for the Decision

The main request

1. The main request corresponds to the auxiliary request before the examining division.

2. Inventive step

2.1 The appellant acknowledges that D1 discloses all the features of claim 1 except that

- the interface is split across two processors,

- with a first interface portion residing on a first processor associated with the remote data service application, and

- a second interface portion residing on a second processor associated with the TCP/IP protocols software layer.

2.2 The examining division held that the distribution of tasks between two processors was a standard design solution and that the claimed allocation was obvious since the TCP/IP part was a processing-intensive operation for which separate hardware solutions were available.

2.3 The appellant has argued that the problem of mastering a high processing intensity was not known from the closest prior art document D1, but only from D2. D2 disclosed in connection with TCP/IP processing that in order to reduce the CPU load the packet size should be large. It also mentioned a latency problem, which might have led the skilled person to employ a faster processor. There was however no suggestion in D2 to split tasks between two processors.

2.4 The appellant's arguments are not persuasive. Although it may be true that D1 does not mention the problem of processing intensity, the Board is convinced that the skilled person in the field of electronics would as a matter of routine design always consider what circuits are best suited to perform a given processing task. Clearly its complexity is a highly relevant criterion. If the task can be seen to require a processor, the skilled designer would choose between available types, taking all their characteristics into account (performance, power consumption, price, etc). To opt for a pair of processors to perform a given task rather than a single processor must be regarded as a standard choice any designer would be prepared to make. No different conclusion can be drawn from the mere fact that D2 does not refer to this possibility, which its authors may have regarded as too trivial to earn a mention.

As to the appellant's argument that the skilled person would instead have used a single, fast processor the Board notes that according to the jurisprudence of the Boards of Appeal a technical problem may have more than one obvious solution (cf. "Case Law of the Boards of Appeal of the European Patent Office", 5th edition, 2006, I.D.8.19.6). The only possibility for an apparently obvious solution to involve an inventive step seems to be if another solution (here: a single powerful processor) is so dominant as to create a technical prejudice in its favour. In the case under consideration, however, there is no evidence of a prejudice. Nor is this apparent from the application itself, which refers to one- and two-processor designs as largely equivalent (paragraph [0034] of the published application):

"It will be appreciated that the director 48 has been implemented as a two-processor architecture for performance reasons, that is, to off load the processing intensive TCP/IP operations from the processor that handles the RDF interface to the link processor. However, a single processor solution is also contemplated".

2.5 As to the allocation of duties between the processors, the Board agrees with the examining division that it was natural to assign one processor to manage the TCP/IP protocol. The appellant accepts that commercial circuits existed for this at the priority date, something which is also confirmed in the description (paragraph [0032]):

"Although FIG. 5 shows the link processor firmware 84 as including network (e.g., Gigabit Ethernet) driver and hardware interface software (layers 104, 106), it will be appreciated that one or both of these layers could be implemented in a separate, commercially available Gigabit MAC device or chipset."

Clearly there is nothing inventive in using a known processor for the purpose it has been designed for, nor in leaving tasks for which it has not been designed to other circuits.

2.6 Thus, the subject-matter of claim 1 does not involve an inventive step (Article 56 EPC 1973).

The auxiliary request

3. Claim 1 of the auxiliary request includes a shared memory which contains inbound and outbound data structures for managing the transfer of messages and data between the first interface portion and the second interface portion. The Board takes the view that since all data must pass through the interface portions (as shown in fig. 6 of the present application) it is not just obvious but virtually inevitable that two communicating processors share some memory - for example for buffering purposes - and exchange data and messages.

The appellant has suggested that the shared memory serves to combine data and messages so that data can be properly routed to its destination. The Board is not convinced that the description actually discloses this, but even if it did claim 1 is not limited in this way. It merely states that the memory is for "managing" the transfer of messages between the interface portions. This is a very general concept.

Thus, also the subject-matter of claim 1 of the auxiliary request does not involve an inventive step (Article 56 EPC 1973).

ORDER

For these reasons it is decided that:

The appeal is dismissed.