T 0017/07 () of 20.12.2010

Summary of Facts and Submissions

I. The appellant contests the decision of the examining division to refuse European patent application No. 99 962 985.0. Reasons for the refusal were that the independent claims according to the main and first to third auxiliary requests were unclear, contrary to Article 84 EPC.

II. With a communication dated 8 March 2010, the Board informed the appellant that the claims of the main request in the version refused by the first instance, then maintained as main request with the statement of grounds of appeal filed with a letter dated 30 October 2006, appeared to contravene Article 84 EPC. Moreover, claims 8, 18, 30 and 40 of the main request did not appear to meet the requirements of Article 123(2) EPC.

III. With a letter faxed on 24 November 2010, the applicant filed a new set of claims 1 to 38 according to a main request and amended pages 4a and 10 of the description.

Claim 1 of the main request reads as follows:

"An interleaver (16), comprising:

means for writing data elements sequentially by rows to a matrix of bit storage locations, the matrix comprising a first plurality of rows and a second plurality of columns;

means for permuting the rows of the matrix;

means for pseudo-randomly rearranging the data elements in each row in the matrix of bit storage locations in accordance with a linear congruential sequence recursion, wherein the linear congruential sequences associated with two distinct rows are different; and

means for reading the data elements sequentially by columns from the matrix of bit storage locations."

Independent claim 10 of the main request reads as follows:

"A turbo coder (10), comprising:

a first coder (12) configured to receive a plurality of input bits in succession and generate a first plurality of output symbols therefrom;

an interleaver (16), comprising:

means for writing the plurality of input bits sequentially by rows to a matrix of bit storage locations, the matrix comprising a first plurality of rows and a second plurality of columns;

means for permuting the rows of the matrix;

means for pseudo-randomly rearranging the bits in each row in the matrix of bit storage locations in accordance with a linear congruential sequence recursion, where in (sic) the linear congruential sequences associated with two distinct rows are different; and

means for reading the bits sequentially by columns from the matrix of bit storage locations to provide a plurality of interleaved bits; and

a second coder (14) configured to receive the plurality of interleaved bits in succession from the interleaver (16) and generate a second plurality of output symbols therefrom."

Independent method claim 21 of the main request reads:

"A method of interleaving data elements, comprising the steps of:

writing data elements sequentially by rows to a matrix of bit storage locations, the matrix comprising a first plurality of rows and a second plurality of columns;

permuting the rows of the matrix;

pseudo-randomly rearranging the data elements in each row in the matrix of bit storage locations in accordance with a linear congruential sequence recursion, wherein the linear congruential sequences associated with two distinct rows are different; and

reading the data elements sequentially by columns from the matrix of storage locations."

Independent method claim 30 of the main request reads:

"A method of turbo coding, comprising the steps of:

receiving a plurality of input bits in succession;

generating a first plurality of output symbols therefrom;

writing the plurality of input bits sequentially by rows to a matrix of bit storage locations, the matrix comprising a first plurality of rows and a second plurality of columns;

permuting the rows of the matrix;

pseudo-randomly rearranging the bits in each row in the matrix of bit storage locations in accordance with a linear congruential sequence recursion, wherein the linear congruential sequences associated with two distinct rows are different; and

reading the bits sequentially by columns from the matrix of bit storage locations to provide a plurality of interleaved bits in succession;

receiving the plurality of interleaved bits in succession; and

generating a second plurality of output symbols therefrom."

Claims 2 to 9, 11 to 20, 22 to 29 and 31 to 38 are dependent on claims 1, 10, 21 and 30, respectively.

IV. It can be understood from the file that the appellant requests that the decision under appeal be set aside, that the set of claims 1 to 38 according to the main request filed with a letter of 24 November 2010 and amended pages 4a and 10 of the description filed with the same letter be considered to be allowable with regard to Articles 123(2) and 84 EPC, and that the case as presently amended be remitted to the department of first instance for further examination of novelty and inventive step.

V. The applicant's arguments can be summarized as follows:

Claim 1 was not limited to physical rearrangement of data elements as appeared from page 6, lines 30 to 34 of the published application WO00/35103. The application described a first embodiment relating to a physical rearrangement of data elements and another embodiment relating to a rearrangement using address manipulation. Thus, claim 1, and for the same reasons the independent claims 10, 21 and 30, of the main request were clear and supported by the description (Article 84 EPC).

The set of claims according to the main request was based on the application as originally filed and met the requirements of Article 123(2) EPC.

Reasons for the Decision

1. The appeal is admissible.

2. The Board is satisfied that the claims according to the main request filed with the letter of 24 November 2010 and the description presently on file with amended pages 4a and 10 filed with the same letter do not contravene Article 123(2) EPC. More specifically:

2.1 No objection pursuant to Article 123(2) EPC was raised during the examination proceedings against the set of claims of the main request in the version refused by the first instance.

2.2 The set of claims according to the present main request differs from the set of claims according to the refused main request (that was filed with a letter of 24 February 2006) in that:

- the terms "but may, in the alternative, be the same" have been deleted in the independent claims 1, 11, 23 and 33 of the refused main request, now renumbered 1, 10, 21 and 30, respectively;

- dependent claims 2, 12, 24 and 34 of the refused main request have been deleted and the other dependent claims renumbered;

- claims 8, 18, 30, 40 of the refused main request (now respectively numbered 7, 16, 27, 36) now read "wherein x(0) equals 0";

- claim 21 of the refused main request (renumbered 19) now reads "wherein said means for pseudo-randomly rearranging are arranged for generating LCSs on the read, addressed by said second coder (14)";

- in claims 27 and 37 (respectively renumbered 24 and 33), steps (iii) and (iv) have been reintroduced.

2.3 Specifying in the independent claims that the LCSs associated with two distinct rows are different is supported by the originally filed description (see published application WO00/35103, page 10, lines 6 and 7) and does not extend beyond the content of the original application because the original description indicates that having the same LCSs is an alternative thereto. Support for present claims 7, 16, 27, 36 can be found at page 11, line 5 and in table 3; support for present claim 19 can be found at page 6, lines 30 to 34; present claims 24 and 33 are identical to originally filed claim 15.

3. The Board is satisfied that the claims according to the main request filed with the letter of 24 November 2010 considered with amended description pages 4a and 10 filed with the same letter meet the requirements of Article 84 EPC. More specifically:

3.1 The claimed interleaver of claim 1 of the present main request comprises "means for permuting the rows of the matrix and means for pseudo-randomly rearranging the data elements in each row in the matrix of bit storage locations in accordance with a linear congruential sequence recursion". However, claim 1 covers both means that physically write the permuted rows and rearranged data elements in the matrix and means that generate indexes which can be used for permuting the rows and rearranging the data elements in each row.

3.2 The additional features contained in dependent claim 8 specify that the means for permuting and pseudo-randomly rearranging physically rearrange the data elements in the matrix. The additional features recited in dependent claim 9 specify that said means provide final row and column indexes identifying the data elements to be read from the matrix, thus specifying interleaving "on the read".

3.3 Both alternatives are supported by figure 2 of the application and the related passages of the description which do not specify how the outputs "next row" and "final row index" in figure 2 may be used. The skilled person reading the description understands that the outputs of figure 2 may be used for physically permuting and rearranging the data elements into the matrix as explained in the description, pages 10 and 11. The skilled person understands also from the passage "a physical rearrangement of the data elements may advantageously be circumvented in favor of using the pseudo-randomly generated LCS on the read addressed by the second encoder" (page 6, lines 30 to 34) that said outputs may be used to implement interleaving "on the read". Moreover, the Board has no doubt that the description discloses both kinds of permuting and rearranging means in a manner sufficiently clear and complete for them and corresponding interleavers to be made and used.

3.4 Therefore, claim 1 covers an interleaver with a physical rearrangement of the data in the matrix as well as an interleaver using interleaving "on the read". The description of the application in relation with figure 2 supports both implementations. Accordingly, claim 1 meets the requirements of Article 84 EPC, in particular in view of the fact that a broad claim is not to be equated with one lacking clarity.

3.5 The above considerations apply mutatis mutandis to independent claims 10, 21 and 30.

4. The independent claims of the present main request differ in their substance from independent claims 1, 10 and 18 as originally filed, claims 1 and 19 filed with the applicant's letter of 24 February 2003, and claims 1 and 20 filed with the applicant's letter of 15 January 2004, which were objected during the first instance procedure as lacking novelty or inventive step. Thus, the Board notes that no assessment of novelty or inventive step of independent claims 1, 10, 21 and 30 of the present main request was made by the first instance. In such circumstances, the Board finds it appropriate to remit the case to the department of first instance for further prosecution, in particular for further examination of novelty and inventive step as requested by the appellant (Article 111(1) and (2) EPC).

ORDER

For these reasons it is decided that:

1. The decision under appeal is set aside.

2. The case is remitted to the department of first instance for further prosecution.