T 1378/04 () of 20.6.2006

Summary of Facts and Submissions

I. The appellant contests the decision of the examining division to refuse European patent application No. 96 116 597.4. The reasons given for the refusal were that the application failed to meet the requirements of Rule 86(4) EPC. The requirements of Article 52(1) EPC in the sense of Articles 54(1) and (2) EPC, and Article 84 EPC were also not considered to be satisfied.

II. In a communication accompanying summons to oral proceedings, the Board observed inter alia that claim 1 of the set of claims refused by the examining division contravened Article 123(2) EPC in some respects. With a letter of reply dated 18 May 2006, the appellant filed an amended claim 1.

III. Oral proceedings were held on 20 June 2006.

IV. The appellant requested that the decision under appeal be set aside and that a patent be granted in the following version:

claims: claim 1 filed with the letter dated 18 May 2006, claims 2 to 8, filed with the letter of 11 March 2004;

description: pages 1 to 10, 12 to 18, 20 and 23 to 26, as originally filed and pages 11, 19, 21 and 22 filed with letter of 18 December 2002;

drawings: figures 1 to 10, 12 and 14 to 21 as originally filed, and figures 11 and 13 filed with the letter of 18 December 2002.

V. Present claim 1 reads as follows:

"A semiconductor switching apparatus, comprising:

a semiconductor switching element (3) having first, second and third electrodes, for carrying a main current (IA) which flows into the first electrode (3A) from the first electrode directly to the second electrode (3K) when brought into an on-state in response to a turn-on control current applied to the third electrode (3G); and

driving control means (4) connected between the third and second electrodes (3G, 3K), for producing the turn-on control current and applying it to the third electrode (3G);

- wherein the main current (IA) is entirely commutated to the driving control means (4) through third electrode from the first electrode in a direction reverse to the turn-on control current at a turn-off during which the main current decreases from a constant positive value towards a zero-level,

- wherein no current flows directly between the second electrode and the third electrode for a period of the turn-off, starting when the main current (IA) starts decreasing and ending when it reaches the zero-level

- wherein the driving control means have a sufficient capacitance (C2) to carry a turn-off control current (IGQ) not less than the main current (IA),

- wherein an inductance existing in a path (R1) from the third electrode through the driving control means and the second electrode to the third electrode is determined so that the main current is commutated for the period of the turn-off, and

- wherein the capacitance (C2) discharges the electric charges towards the third electrode at a time (t1) before the period (from T4 to a time of IA=0) of the turn-off to thereby bring a pn junction between a semiconductor layer (p) of the semiconductor switching element (3) under the third electrode (3G) and a semiconductor layer (n) of the semiconductor switching element (3) under the second electrode (3K) into a backward bias state which cuts off any current except a recovery current (deltaIGQ) and to generate the turn-off control current (IGQ) of which an absolute value is always equivalent to that of the main current (IA) for the period of the turn-off."

Claims 2 to 8 are dependent on claim 1.

The amended pages 11, 19, 21 and 22 of the description differ from the corresponding pages of the application as originally filed in substance by specifying a gain G=1 (page 11, line 25), an anode current (IA) which is equal to the gate reverse current (IGQ) (page 19, lines 22 and 24; page 22, line 21), and a turn-off gain G=1 after the recovery (page 22, line 2).

The amended figures 11 and 13 now show that in the invention the turn-off control current (IGQ) and the main current (IA) are equal (G=1).

VI. Regarding the objections raised against claim 1 under Articles 84 and 123(2) EPC in the communication of the Board, the appellant's arguments may be summarized as follows:

in the present version of claim 1,

- the period of the turn-off wherein no current flows directly between the second electrode and the third electrode has been defined more precisely, based on figure 9, to specify "a period of the turn-off, starting when the main current (IA) starts decreasing and ending when it reaches the zero-level",

- the capacitance of the driving control means has been amended, in accordance with the Board's proposal, based on figure 9 and the parts of the original specification which specified that these means "have a capacitance enough to carry the gate reverse current IGQ not less than the main current IA", and

- the term "immediately" in the last paragraph of claim 1 has been deleted.

Reasons for the Decision

1. The appeal is admissible.

2. The present application differs inter alia from the application as originally filed by the limitation to a turn-off gain G (which is represented by the absolute value of the ratio of the main current IA to the gate reverse current IGQ, i.e. the turn-off control current) equal to 1 (G=1) during the turn-off, and more specifically after the recovery and during a period of the turn-off starting when the main current IA starts decreasing and ending when it reaches the zero-level. This appears more specifically from:

- the last paragraph of present claim 1, according to which "the capacitance (C2) discharges the electric charges towards the third electrode at a time (t1) before the period (from T4 to a time of IA=0) of the turn-off ... to generate the turn-off control current (IGQ) of which an absolute value is always equivalent to that of the main current (IA) for the period of the turn-off"; and

the amended pages 11, 21 and 22 of the description, and the amended figures 11 and 13, according to which the turn-off gain has a value G=1 during the turn-off, and more specifically after the recovery (see section V above).

3. In the judgment of the Board, the present application contravenes Article 123(2) EPC because its subject-matter, in particular claim 1, has been amended to comprise features which extend beyond the content of the application as filed.

3.1 According to the content of the originally filed application as a whole (published application, column 7, line 57 to column 8, line 39; column 9, lines 45 to 47; column 12, lines 41 to 55), and more specifically the passages thereof which explain the differences of the invention over the prior art with reference to figures 11 and 13 (column 14, lines 32 to 43) as well as claims 2 and 3 as originally filed, the turn-off gain G at the turn-off is determined according to the invention to be not more than 1 (G<=1), namely the gate reverse control current IGQ should be not less than the main current IA. This is in particular true during the first period of the turn-off (T1 to T2), before the recovery, where the "turn-off gate current IGQ becomes the value equivalent to the absolute value of the main current IA or more in extremely short time" (emphasis added by the Board).

3.2 Figure 9 depicts a gate reverse control current IGQ and a main current IA which are equal in absolute value at a time T2 and during the period T3 to T4 starting when the anode-cathode voltage starts rising, and ending when the main current starts decreasing (i.e. after the recovery period). However, it is neither shown in figure 9, nor derivable therefrom, that the turn-off control current IGQ and the main current IA are equivalent (in absolute value) for "a period of the turn-off starting when the main current (IA) starts decreasing and ending when it reaches the zero-level" (i.e. after T4), as specified in the last feature of claim 1.

3.3 It is true that during the recovery period (from T2 to T3), the turn-off gain is greater than 1 (column 13, lines 11 to 14; column 14, lines 12 to 16). This does not mean that the expression G<=1 should be understood in the application as specifying a unity gain (G=1) during "a period of the turn-off starting when the main current (IA) starts decreasing and ending when it reaches the zero-level" because this period follows the recovery period. No support for such an interpretation can be found in the description as originally filed which does not even mention such "a period of the turn-off". Nor is it possible to derive such a feature from the passage of the original description "Then, the relation |the anode current IA of the GTO 3|<=|the gate reverse current IGQ| holds and the cathode current Ik=0. After that, the state of |IA|<=|IGQ| remains until the GTO 3 is completely turned off." (column 12, lines 51 to 55), which does not specify clearly any one of the periods of the turn-off to which it refers.

3.4 In the judgement of the Board, the relation |IA|<=|IGQ| expressing that the anode current IA is not more than the gate reverse current IGQ, i.e. G<=1, should not be understood in the originally filed application as specifying a range in which a specific value of the turn-off gain G, and particularly a unity gain G=1, can be freely chosen for each particular period of the turn-off as a control parameter. For instance, when a recovery current flows, the turn-off gain is necessarily more than 1 (point 3.3 above). This relation expresses conditions which should be fulfilled by the capacitance and inductance of the driving control means to ensure that at any time during a turn-off operation, even during the first period of the turn-off (see point 3.1 above), the gate reverse current IGQ is not less than the main current IA and thus the cathode current is zero, (column 7, line 49 to column 8, line 39), irrespective of the initial value of the anode current and the values of the decreasing anode current which depend on the load. Accordingly, the limitation to the relation |IA|=|IGQ| for the main and gate reverse currents for the period of the turn-off as it is recited in the last feature of claim 1 is not part of the content of the originally filed application, contrary to Article 123(2) EPC.

4. Present claim 1 includes the additional feature: "wherein no current flows directly between the second electrode and the third electrode for a period of the turn-off, starting when the main current (IA) starts decreasing and ending when it reaches the zero-level". Since this feature was not disclosed in the originally filed application, claim 1 contravenes Article 123(2) EPC in this respect too. More specifically:

4.1 According to the original application (figure 9; column 12, line 56 to column 13, line 23), a current flows directly between the cathode and the gate of the semiconductor switching element when a recovery current flows in the NPN transistor 81. However, this recovery current decreases to zero before the anode-cathode voltage VAK starts rising (time T3 in figure 9). Thus there is no basis in the original application for a limitation of the period wherein no current flows between the cathode and the gate to a period of the turn-off as specified in claim 1 (i.e. the period starting at time T4).

5. The Board therefore concludes that the application in its present state contravenes Article 123(2) EPC. Hence the appellant's request cannot be granted and the appeal must be dismissed.

ORDER

For these reasons it is decided that:

The appeal is dismissed.