T 0783/04 () of 5.3.2008

European Case Law Identifier: ECLI:EP:BA:2008:T078304.20080305
Date of decision: 05 March 2008
Case number: T 0783/04
Application number: 95107433.5
IPC class: H04N 1/417
Language of proceedings: EN
Distribution: D
Download and more information:
Decision text in EN (PDF, 32 KB)
Documentation of the appeal procedure can be found in the Register
Bibliographic information is available in: EN
Versions: Unpublished
Title of application: Code conversion system
Applicant name: MITSUBISHI DENKI KABUSHIKI KAISHA
Opponent name: Spandern, Uwe
Board: 3.5.04
Headnote: -
Relevant legal provisions:
Rules of procedure of the Boards of Appeal Art 13(1)
European Patent Convention 1973 Art 56
European Patent Convention 1973 Art 114(2)
Keywords: Inventive step (yes)
Late submitted material - document admitted (no)
Catchwords:

-

Cited decisions:
-
Citing decisions:
-

Summary of Facts and Submissions

I. The appeal is against the decision by the opposition decision to revoke European patent 0 683 600 on the grounds that the subject-matter of claims 1 and 6 as granted lacked inventive step, Article 56 EPC 1973, in view of document

E1: JP 04357769 A

and its English translation (hereinafter referred to as E1').

II. The independent claims of the patent as granted read as follows:

"1. A code conversion system comprising:

first storage means (1) for storing arithmetically coded image data;

arithmetic decoding means (2) for decoding the arithmetically coded image data stored in said first storage means on the basis of reference pixels for outputting an original image data;

a line buffer memory (5-7) for storing at least a predetermined number of scanning lines of said original image data output from said arithmetic decoding means;

one dimensional image coding means (3) for receiving said original image data from said line buffer memory, performing one dimensional image coding and outputting one dimensional image coded data; and

second storage means (4) for storing said one dimensional image coded data output from said one dimensional image coding means,

said arithmetic decoding means reading out said predetermined reference pixels from said line buffer memory, and

said predetermined number of scanning lines being the scanning lines including said predetermined reference pixels."

"6. A code conversion system comprising:

first storage means (11) for storing one dimensional coded image data;

one dimensional image decoding means (12) for reading out said one dimensional coded image data from said first storage means;

a line buffer memory (15-17) receiving the image data decoded by said one dimensional image decoding means, and storing a predetermined number of scanning lines of said image data including pixels to be used as reference pixels upon coding according to an arithmetic coding system;

arithmetic coding means (13) for taking coding objective pixels and coding reference pixels from said image data in said line buffer memory and performing arithmetic coding; and

second storage means (14) for receiving arithmetically coded image data from said arithmetic coding means and storing the same."

III. The reasons given in the decision under appeal may be summarized as follows.

The subject-matter of claim 1 differed from the disclosure of the closest prior art document E1 in the following features:

i. a line buffer memory for storing at least a predetermined number of scanning lines of said original image data output from said arithmetic decoding means and

ii. said predetermined number of scanning lines being the scanning lines including said predetermined reference pixels.

The provision of a line buffer memory for storing at least the number of scanning lines which contain the reference pixels necessary for the arithmetic coding or decoding process would be entirely obvious to the skilled person. Even though the size of the buffer memory is not dealt with in E1, the skilled person would necessarily choose the claimed minimum capacity because a memory capacity smaller than the number of scanning lines including the reference pixels would prevent the arithmetic coder and decoder from working properly.

IV. The patent proprietor appealed, requesting that the decision be set aside and the patent maintained.

V. In reply, the respondent (opponent) requested that the appeal be dismissed.

VI. In an annex to a summons to oral proceedings the board set out its preliminary opinion on the appeal, stating that the line buffer memory mentioned in claims 1 and 6 seemed to play a part in implementing the coding model preceding arithmetic coding or following arithmetic decoding, rather than playing a part in the arithmetic coding/decoding itself. E1 did not mention the use of a coding model using a plurality of lines or arithmetically coded data being transmitted between fax machines. Hence the subject-matter of claims 1 and 6 seemed to differ from the disclosure of E1 by more features than had been previously argued by either party.

VII. In a submission dated 5 February 2008 the respondent referred to the following documents cited in the notice of opposition and discussed in the opposition proceedings:

E2: JP 05219388 A and

E3: JP 04115668 A.

The respondent argued essentially that means for converting between arithmetically coded data and one dimensionally coded data were known from E1 and E2. In the context of arithmetic coding/decoding using reference pixels, the skilled person would realize the buffer known from E1 (see paragraph [0019] of E1') as a line buffer memory as a matter of usual design. Moreover such a line buffer memory would have to be big enough to store the necessary number of reference pixels in order for the arithmetic coding/decoding to work. The subject-matter of claims 1 and 6 was thus either known from, or at least rendered obvious by, the disclosure of either E1 or E2. Moreover one and two dimensional code conversion (MH and MR coding, respectively) was known from E3. Although E3 did not mention arithmetic coding, this was similar to the two dimensional code (MR) mentioned in E3 which also made use of reference lines and several line buffer memories. Starting from this background, the skilled person would arrive at the alleged invention in an obvious manner.

The respondent also cited document

E12: EP 0 395 394 A2

for the first time, arguing that its disclosure could readily be considered together with that of E1, E1 encompassing the essence of E12.

VIII. In a submission also dated 5 February 2008 the appellant filed three sets of amended claims according to first, second and third auxiliary requests.

IX. Oral proceedings were held before the board on 5 March 2008.

X. The appellant's written and oral arguments may be summarized as follows.

E1 dealt with the problem arising in communication terminals that the result of MH or MR coding could be larger than the original data, preventing the size of the memory required to store it from being reliably predicted. In E1 this problem was solved by arithmetic coding, since the arithmetically coded data was of a predictable size. E1, in particular paragraphs [0007] and [0008], although mentioning arithmetic coding, did not mention arithmetic coding using a coding model with reference pixels, as described in the patent in suit. Moreover E1 neither mentioned nor suggested a line buffer memory dimensioned with respect to the coding model being used, nor did it mention storage means for storing the one dimensional image coded data output from the one dimensional coding means. The buffer memory mentioned in paragraph [0019] was only "preferably provided" and essentially served the same purpose of matching the transmission data rate.

The subject-matter of granted claims 1 and 6 differed from the disclosure of E1 by more features than identified in the decision under appeal, essentially in using templates, E1 containing no mention of templates, and in having storage means for linear code, E1 teaching away from this.

E2, in particular figure 10, concerned the reception of facsimile images and the generation of successive layers of images of differing resolution. In contrast to the subject-matter of the claims, E2 did not mention the storage of one dimensionally (MH) coded data and concerned a different problem to the patent. E3 related to the reduction in the number of line buffers required for encoding and decoding, but did not mention simultaneous decoding and encoding or arithmetic coding. E12 was late filed and of little relevance and should not be introduced into the proceedings.

XI. The appellant requested that the decision under appeal be set aside and the patent maintained as granted (main request), or, in the alternative, that the patent be maintained on the basis of the claims of one of the first to third auxiliary requests filed with the letter dated 5 February 2008.

XII. The respondent requested that the appeal be dismissed, stating that he had nothing to add to his written submissions.

XIII. At the end of the oral proceedings the board announced its decision.

Reasons for the Decision

1. The appeal is admissible.

2. Document E12

E12 was submitted and referred to after the respondent had replied to the appeal and thus constitutes an amendment to the respondent's case, which may be admitted and considered at the board's discretion, Article 13(1) RPBA.

The respondent has not given any reasons for the lateness nor cited any particular passages of E12 which might justify its introduction into the proceedings at this late stage. The board finds that E12 is less relevant than the documents already in the proceedings, in particular E1. Indeed the respondent has argued that E1 encompasses the essence of E12.

The board consequently decided in the oral proceedings not to admit E12 into the proceedings, Article 114(2) EPC 1973 and Article 13(1) RPBA.

3. The invention (as disclosed in the patent specification)

The invention relates to a code conversion system capable of mutual conversion between an arithmetic coding system and a one dimensional coding system; see paragraph [0001]. Binary arithmetic encoding/decoding systems as defined in CCITT T.82 perform encoding and decoding by loading a plurality (for example 10 bits) of reference pixels ("template") of the image data; see paragraph [0008] and figure 4. Therefore at least the values of the pixels corresponding to the template and the objective pixels for encoding are required to perform coding; see paragraph [0008]. Two line reference templates (see figure 8) or three line reference templates (see figure 4) are used in the context-based arithmetic coding/decoding (see paragraphs [0043] and [0089]).

A person skilled in the art of code conversion of binary image data, as employed in facsimile communication, would be familiar with the basics of the relevant standards, such as T.4 (one dimensional MH code) and T.82 (arithmetic coding using two-line or three-line templates; see also paragraph [0032]). It is thus clear from the description and the common general knowledge that the terms used in claims 1 and 6 (image data; reference pixels; (plural) scanning lines) refer to code conversion in a context where arithmetic coding/decoding implies the use of a plurality of scanning lines (two or three line templates) including image data (pixels) to be coded/decoded and pixels used as reference pixels. A line buffer memory stores the number of scanning lines which are required for this code conversion and, in combination with the first and second storage means, makes it possible to simultaneously perform coding and decoding on the predetermined number of scanning lines; see paragraphs [0010] and [0164]. Instead of total conversion of all image data (or a complete page), the coded image data can be sequentially processed; see paragraph [0163]. It would go against the teaching of the opposed patent if all the scanning lines were stored in the line buffer memory and the data converted at one time (see paragraphs [0007], [0009] and [0163]). In the judgment of the board, this is the meaning of "a predetermined number of scanning lines" and "at least a predetermined number of scanning lines" in claims 6 and 1, respectively.

4. The closest prior art (Document E1)

It is common ground that E1 forms the closest prior art. E1 concerns an image communication terminal in which image data from a scanner or the like is accumulated in a buffer memory 104, then arithmetically coded and stored in accumulating device 103, then decoded, buffered and coded using a method appropriate to the remote terminal; see E1', paragraph [0018] and page 17, first three lines. According to claim 11, the remote terminal can carry out at least one of MH, MR and MMR image coding. When the image communication terminal receives encoded data from a remote terminal substantially reverse processes of those for transmission are performed; see E1', page 17, lines 5 to 7.

There is no hint in E1 at using a coding model having reference pixels before the arithmetic coding step or after the arithmetic decoding step. Moreover there is no suggestion in E1 that buffer memory 104 could be a line buffer memory dimensioned with respect to the coding model being used. Arithmetic coding in E1 is only used within the image communication terminal to code the data stored in accumulating device 103, since the size of the resulting encoded data does not exceed that of the original data and is thus of a predictable size; see the sentence bridging pages 10 and 11 of E1'. E1 also does not mention storage means for storing the one dimensional image coded data output from the one dimensional coding means.

5. Novelty

5.1 Claim 1

It is common ground between the parties, as stated in the appealed decision, that the following features of claim 1 are not known from E1:

i. a line buffer memory for storing at least a predetermined number of scanning lines of said original image data output from said arithmetic decoding means and

ii. said predetermined number of scanning lines being the scanning lines including said predetermined reference pixels.

Moreover, in the light of the above analysis, the following features of claim 1 are also not known from E1:

iii. the arithmetic decoding means decoding on the basis of reference pixels read out from the line buffer memory and

iv. storage means for storing said one dimensional image coded data output from said one dimensional image coding means.

5.2 Claim 6

Also in the light of the above analysis, the following features of claim 6 are not known from E1:

i. storage means for storing one dimensional coded image data and

ii. a line buffer memory receiving the image data decoded by the one dimensional image decoding means, and storing a predetermined number of scanning lines of said image data including pixels to be used as reference pixels upon coding according to an arithmetic coding system, the arithmetic coding means taking coding objective pixels and coding reference pixels from said image data in the line buffer memory.

5.3 Conclusion on novelty

The board consequently agrees with the finding in the appealed decision (page 5) that the subject-matter of claims 1 and 6 is new, Article 54(1,2) EPC 1973.

6. Inventive step

6.1 The objective technical problem

The objective technical problem is seen as that derivable from paragraphs [0009] and [0010] of the published patent, namely to reduce the time and memory required for code conversion. The skilled person starting from E1 would consider such a problem as a matter of usual design.

6.2 Inventive step in view of E1 alone

The solution to this problem set out in claims 1 and 6 consists essentially in using a line buffer memory to store the scanning lines necessary for the coding model following arithmetic decoding (claim 1) or for the coding model prior to arithmetic coding (claim 6) and allowing direct communication between the line buffer memory and the one dimensional image coding means (claim 1) or the one dimensional image decoding means (claim 6). The memory required for the code conversion is consequently reduced and coding occurs simultaneously with decoding, thus reducing the time required for code conversion.

E1 contains no hint at such a solution. In particular, although claim 6 of E1 mentions the first storage means, in other words buffer memory 104, having a size smaller than that of one screen of image data, there is no suggestion of realizing the buffer memory based on a coding model. Instead, E1 states that the size of buffer memory 104 is set to match data transmission rates, for instance between the scanner and the arithmetic coder; see E1', the sentence bridging pages 15 and 16. Concerning a possible code conversion between a one dimensional code (e.g. MH) and a two dimensional code (e.g. MR), E1 merely mentions that a buffer memory is preferably provided (claim 11 and paragraph [0019] of E1') without giving any details as to how the conversion is carried out. Consequently it has to be assumed that a person skilled in the art would perform the conversion in a conventional way, for instance by providing a buffer memory for all of the decoded data and total conversion as indicated in the opposed patent (figure 27; paragraphs [0006] and [0163]).

Hence the contribution of the opposed patent over E1 is not merely the obvious replacement of a buffer memory in E1 by a known line buffer memory and the choice of a minimum capacity to properly work, as the opposition division held in the decision under appeal (see point III above), but a different structure and operation of the code conversion system for which there is no hint in E1.

6.3 Documents E2 and E3

The respondent has not cited any specific passages of E2 or E3, these documents and their English translations having been filed with the notice of opposition. E2 concerns the decoding of one dimensional (MH) coded video data, storage of the decoded data in line buffers and arithmetic and (two dimensional) JBIG coding to display image layers of progressively increasing resolution. E3 relates to a circuit which can be used both for MR image data coding and decoding, using a total of three line buffers. A switching unit permits arbitrary selection of a reference line, an encoding line and a decoding line (see E3, page 6, paragraph 3). Neither document hints at the claimed solution. In particular, neither document hints at (direct) communication between a line buffer memory used in arithmetic decoding/coding and one dimensional image coding/decoding means. Hence the combination of E1 with either E2 or E3 does not yield the subject-matter of claims 1 or 6 in an obvious manner.

6.4 Conclusion on inventive step

Contrary to the finding in the appealed decision (page 7), the board concludes that the subject-matter of claims 1 and 6 involves an inventive step, Article 56 EPC 1973.

7. Conclusion

The appellant's main request is allowable. Consequently the appellant's auxiliary requests need not be considered.

ORDER

For these reasons it is decided that:

1. The decision under appeal is set aside.

2. The patent is maintained unamended.

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