T 0570/03 (Permutation processor/HEWLETT-PACKARD) of 7.3.2006

Summary of Facts and Submissions

I. European patent application number 96 305 187.5 (publication no. 0 757 312) entitled "Data Processor" was refused by the examining division for insufficiency of disclosure under Article 83 EPC.

II. The refusal decision dated 6 December 2002 was based on amended application documents, including amended claims filed by a letter dated 15 June 2001. Claim 1 has the following wording:

"1. A data processing system including shifting apparatus (100) for shifting the contents of an input register (155) to generate the contents of an output register (165); said apparatus comprising an ordered plurality of stages of multiplexers (145, 185, 186), including a first stage (145), and a last stage (186), said first stage including as inputs thereto the contents of said input register (155) and said last stage including as outputs therefrom said contents of said output register (165), each multiplexer being controllable by control lines specifying connections between the inputs and outputs thereof; wherein all of said multiplexers in each stage receive the same control signals on said control lines when said apparatus performs a shifting operation; and control means for independently controlling the control lines of at least one stage of multiplexers in response to an instruction specifying a permutation of the contents of said input register (155) thereby to provide control signals to at least one multiplexer in said stage (145) that differ from said control signals provided to another multiplexer in said stage (145), the ordering of said contents of said output register being independent of said contents of said input register."

III. The examining division objected to the feature that "all of said multiplexers in each stage receive the same control signals on said control lines when said apparatus performs a shifting operation". This feature was in contradiction to the teaching of the application as a whole since none of the embodiments described produced a shifting operation when applying the same control signal to the control lines. Because of this contradiction, the skilled person was not able to carry out the invention; resolving the contradiction would require efforts beyond the ordinary skills in the art.

IV. The applicant lodged an appeal against the decision on 3 February 2003 and paid the appeal fee on the same day. The written statement setting out the grounds of appeal was filed on 31 March 2003.

V. According to the appellant, the decision under appeal was incorrect in fact and incorrect in law. The examining division held that the embodiments of figures 2 and 3 were inextricably linked and essentially identical despite the lack of any support in the application for this view. The claims were specifically directed to the third, "preferred" embodiment shown in figure 3 of the application. From the third full paragraph of page 3 and the second full paragraph of page 4 of the application documents as filed it followed explicitly that there was a difference between the embodiments of figures 2 and 3, implemented by the order register.

The invention, and in particular the embodiment of figure 3, provided a system for extracting bits of information from an input word, which compared with a conventional circuit used less processing time and less components. The statement "The first stage of shifter 100 is exactly the same as the embodiment of Figure 2" on page 4 cited by the examining division included a further provision, namely the requirement of altering the control lines of the conventional shifter such that the multiplexer controls can be set to values that are determined by the contents of an order register. How to set the multiplexers to carry out a permutation and how to set them to carry out a shift was clear from the application.

The specific implementation and instructions to the order register were rather a matter of simple logic design, fully within the grasp of the skilled person. A simple software table could be used for mapping or translating the permutation instruction into appropriate control signals.

VI. The appellant requests that the decision under appeal be set aside. In the case that the request is not allowed, oral proceedings are requested.

Reasons for the Decision

1. The appeal complies with the requirements of Articles 106 to 108 and Rules 1(1) and 64 EPC and is thus admissible.

The appeal is allowable since the application meets the requirement of disclosure of the invention as set out in Article 83 EPC.

2. According to Article 83 EPC, a European patent application must disclose the invention in a manner sufficiently clear and complete for it to be carried out by a person skilled in the art.

The requirement refers to the disclosure of the "invention", to be construed as meaning the invention claimed, i.e. the teaching of the application or the teaching of a part of the application to which the claims relate. Disclosing the invention should not be equated with describing an embodiment or describing, in detail, a way of carrying out the invention. An insufficient or erroneous embodiment may or may not be a hurdle to carrying out the invention. If features which are not essential to the invention are affected, insufficiency regarding an embodiment is normally harmless under Article 83 EPC. But even in respect to essential features of the invention an erroneous or not entirely clear disclosure is tolerable if the skilled person carefully reading the application can readily spot the problem and complement or correct the disclosure without resort to undue efforts or inventive skills.

3. In the present case, the claims are directed to a data processing system including a multi-stage shifter ("shifting apparatus comprising an ordered plurality of stages of multiplexers"), the first stage connected to an input register and the last stage to an output register. To perform a shifting operation, all multiplexers of the same stage receive the same control signal on control lines, selecting the same input of each multiplexer for output. If the inputs of the multiplexers are correctly connected to the input register and the outputs of the previous stage, respectively, a parallel shifting operation of all data items is achieved.

There is no doubt that multi-stage shifters of this type are well-known in the prior art. The application describes some features of a "conventional shifter" in page 4, first paragraph; its implementation as a barrel shifter, for example, is straightforward. The examining division, therefore, was right not to raise any arguments concerning the disclosure of the conventional shifter.

4. The examining division rightly identified a problem in the disclosure of the preferred embodiment, namely that the shifter circuitry shown in figure 3 simply replicates a single data item on all outputs of the first stage when a common control signal is applied. This eliminates all the other data items, which is certainly not what a shifting operation should do.

This failure, however, is evident. The skilled person would easily recognize that it is probably caused by an erroneous drawing of the wiring between the input register and the inputs of the first shifter stage. The failure may also be considered to be caused by an oversimplified or incomplete illustration of the processing unit providing the order word and the control signals, or even to be the result of a non-standard drawing of the multiplexer data inputs in figure 3, which by an appropriate numbering of the multiplexer inputs would simply avoid the problem in issue.

In any case, however, it would be a straightforward solution to replace the incorrect or schematic connections in figure 3 by using the normal wiring scheme of conventional barrel shifters. To implement the example given in page 4, first paragraph, this solution would simply require to connect the first source item to the first input of the first multiplexer, to the second input of the second multiplexer etc., the second source item to the first input of the second multiplexer, to the second input of the third multiplexer etc., and so on, for all source items and first-stage multiplexers. The first multiplexer stage modified accordingly would provide the shift as well as the permutation functions defined in the claims.

Alternatively, an appropriate mapping or translation table between order register and control lines as submitted by the appellant can be implemented to alleviate the problem. Neither one of the possible solutions requires inventive skills or undue efforts to be made by the skilled person.

5. The examining division insisted on a close link between figures 2 and 3, referring in particular to the statement in page 4, second paragraph that "The first stage of shifter 100 is exactly the same as the embodiment shown in Figure 2".

However, this statement has to be understood in its context, which does not support the conclusions drawn by the examining division. The application clearly distinguishes the different embodiments. The preferred embodiment shown in figure 3 utilizes a modification of the conventional shifter, whereas the embodiment of figure 2 shows a simple embodiment of a permutation unit implemented with the aid of a single layer of multiplexers.

In the third paragraph of page 3, it is said: "In the preferred embodiment, the shifter is built from a plurality of stages of multiplexers. In a conventional shifter, each stage of multiplexers has the same control bits. The preferred embodiment requires only that independent controls be established for each multiplexer in at least one of these stages." Evidently, the single multiplexer layer of figure 2 is not suitable as a stage of the conventional shifter since it does not produce any shifting operation.

The difference between the two embodiments becomes still more manifest from the last paragraph of page 3, where it is stated that the embodiment of figure 2 requires additional hardware to be added to the processing unit of the general purpose computer. The preferred embodiment "achieves further advantages over the embodiment shown in figure 2 by sharing the multiplexers that are already present in a conventional shifter, thereby eliminating the need to add additional multiplexers to the conventional computer design".

Therefore, the starting point of the preferred embodiment is the conventional multi-stage shifter as used in general purpose computers. The object of the preferred embodiment, and thus of the invention as claimed, is to add a general permutation function to the functionality of the conventional shifter (see page 2 and page 4, second paragraph), which is achieved by establishing an "independent control for each multiplexer in at least one of these stages" (loc.cit.). The skilled person has certainly no difficulties to implement such an independent control by modifying the conventional design in an appropriate manner.

6. For these reasons, the disclosure of the invention as claimed is considered to be sufficiently clear and complete to meet the requirements of Article 83 EPC.

7. Since the application has not yet been fully examined regarding all of the patentability requirements, the Board considers it appropriate to remit the case to the examining division for further prosecution.

ORDER

For these reasons it is decided that:

The decision under appeal is set aside. The case is remitted to the department of first instance for further prosecution.