T 1199/01 () of 17.5.2004

Summary of Facts and Submissions

I. The appellant contests the decision of the examining division to refuse European patent application No. 98 107 173.1, which is a divisional application from earlier European application No. 91 306 732.8. The reason given for the refusal was that the subject-matter of claim 1 filed with the letter dated 27 February 2001 did not involve an inventive step within the meaning of Article 56 EPC having regard to the prior art documents:

D1: EP-A-0 393 224, and

D2: US-A-4 467 389.

II. The current version of claim 1, which was filed with the letter dated 23 March 2004, reads as follows:

"A semiconductor device protection circuit comprising:

a semiconductor device (11) for receiving at least one device control signal (28) at a control electrode (G) and, in response thereto, selectively passing current through the device between a pair of output electrodes (D, S) of the device;

temperature sense means (13) coupled to said device (11) for developing a temperature sense signal (29, 30) having a magnitude indicative of the temperature of said device; and

control means (24, 31) coupled to said temperature sense means for receiving said temperature sense signal and selectively modifying said device control signal in response to said sensed device temperature exceeding a temperature threshold;

wherein the protection circuit is characterized by a majority of said control means (24, 31) being provided on a control integrated circuit (24), means (31) external to said integrated circuit (24) for allowing external adjustment of the device temperature at which said control means will modify said device control signal which controls the current conducted between said output terminals of said device, and device enabling means (26, 26A) consisting of a Zener diode (26) and a diode (26A) connected in series between one of the output electrodes (D) and the control electrode (G) of the semiconductor device (11) and used in combination with said control means (24, 31) which is arranged in operation to respond to the temperature sense signal to increase on conduction of the semiconductor device (11) in response to the temperature of said device exceeding a first temperature threshold and to turn said device off in response to the temperature of said device (11) exceeding a second threshold lower than said first temperature threshold, thereby protecting said device in the event of a load dump and turning said device (11) on in response thereto, preventing excessive power dissipation by said device during said load dump."

Claims 2 to 5 are dependent on claim 1.

III. The arguments of the appellant can be summarized as follows:

The cited prior art documents did not disclose or suggest, taken singularly or in any combination, a semiconductor device protection circuit having a temperature sense means and control means comprising means external to an integrated circuit for allowing external adjustment of the device temperature at which the control means would modify the signal controlling the semiconductor device.

IV. The appellant requested that the decision under appeal be set aside and that a patent be granted in the following version:

claims: 1 to 5 on pages 20 and 21 filed with letter dated 23 March 2004 and page 20a filed with the grounds of appeal dated 29 October 2001,

description: pages 1 and 4 to 18 as originally filed; page 2 filed with the grounds of appeal dated 29 October 2001; pages 3 and 19 filed with letter dated 1 April 2004, and

drawings: Figures 1, 2A, 2B, 2C, 2D, 2E and 3 as originally filed.

Reasons for the Decision

1. The appeal is admissible.

Amendments

2. The Board is satisfied that the amendments made to the claims and description meet the requirements of Article 84 EPC and do not contravene Article 123(2) EPC. Moreover, the application meets the conditions laid down in Article 76(1) EPC.

2.1. This applies in particular to the present claim 1 which comprises all the features recited in claim 1 of the application as filed (and of the earlier application) and the following additional features:

(a) which controls the current conducted between said output terminals of said device;

(b) and device enabling means (26,26A) consisting of a Zener diode (26) and a diode (26A) connected in series between one of the output electrodes (D) and the control electrode (G) of the semiconductor device (11) and used in combination with said control means (24,31);

(c) which is arranged in operation to respond to the temperature sense signal to increase on conduction of the semiconductor device (11) in response to the temperature of said device exceeding a first temperature threshold and to turn said device off in response to the temperature of said device (11) exceeding a second threshold lower than said first temperature threshold;

(d) thereby protecting said device in the event of a load dump and turning said device (11) on in response thereto, preventing excessive power dissipation by said device during said load dump.

2.2. The feature (a) does not go beyond the definition of the device control signal given near the beginning of claim 1. The feature (c) specifies the way in which the control means operates and corresponds to the feature recited in dependent claim 7 of the application as filed (and the earlier application). The features (b) and (d) are included in all the embodiments of realisation disclosed in the application as filed (and in the earlier application). Accordingly, the additional features incorporated in claim 1 do not extend beyond the content of the application as filed (or of the earlier application).

2.3. Present claims 2 to 5 are unobjectionable under Article 123(2) EPC: claims 2 to 4 are respectively identical to claims 2 to 4 as recited in the application as filed (and the earlier application); claim 5 corresponds to claim 8 of the application as filed (and the earlier application).

Novelty and inventive step

3. The subject-matter of claim 1 is considered to be new (Article 54(1) EPC) because neither of the cited prior art documents discloses a semiconductor device protection circuit comprising control means "which is arranged in operation to respond to the temperature sense signal to increase on conduction of the semiconductor device (11) in response to the temperature of said device exceeding a first temperature threshold and to turn said device off in response to the temperature of said device (11) exceeding a second threshold lower than said first temperature threshold" as recited in the characterizing part of claim 1. More specifically:

3.1. Document D1 (Figure 1; column 2, line 30 to column 5, line 12) discloses a semiconductor device protection circuit in which control means (6-1) are responsive for turning off a semiconductor device (1-1) when a temperature sense means (2- 1) coupled to said device senses a temperature exceeding a first temperature threshold, or when the temperature of other devices of the circuit exceeds a second temperature threshold. D1 thus does not disclose control means for turning on, at a first temperature threshold, and for turning off, at a second lower threshold, a semiconductor device.

3.2. Document D2 relates to a device for protecting the core of a degaussing electromagnet from overheating. It has means for allowing an adjustment of temperature sense means (Figure 9; column 13, lines 26 to 42), but it does not disclose any of the features (a), (b), (c) and (d) identified in paragraph 2.1 above.

4. D1, which is considered as the closest prior art, discloses all the features recited in the pre-characterizing preamble of claim 1. D1, however, discloses neither control means according to the characterizing part of claim 1 (see above paragraph 3.1), nor the other features recited in this characterizing part, e.g. a majority of the control means provided on an integrated circuit, means external to said circuit for allowing adjustment of the temperature device and device enabling means.

5. Starting from D1, the objective problem addressed by the present invention can be seen as providing a protection circuit which enables a semiconductor device to withstand load dump conditions during which excessive voltages are applied between the drain and source terminals of the device, as mentioned in the originally filed application (see columns 1 and 2 of the published application).

5.1. The solution to this problem is to provide the protection circuit with control means according to the characterizing part of claim 1.

5.2. No suggestion of such a solution can be found anywhere in the cited prior art documents D1 and D2, taken alone. Nor can it be derived from a combination of them. The other documents cited in the European Search Report do not suggest the claimed semiconductor device protection circuit.

6. For the foregoing reasons, in the Board's judgement, the subject-matter of claim 1 according to the present request is considered to be new and involve an inventive step within the meaning of Articles 54 and 56 EPC. The application as amended meets the requirements of the EPC.

ORDER

For these reasons it is decided that:

1. The decision under appeal is set aside.

2. The case is remitted to the first instance with the order to grant a patent in the following version:

claims: 1 to 5 on pages 20 and 21 filed with letter dated 23 March 2004 and page 20a filed with the grounds of appeal dated 29 October 2001,

description: pages 1 and 4 to 18 as originally filed; page 2 filed with the grounds of appeal dated 29 October 2001; pages 3 and 19 filed with letter dated 1 April 2004, and

drawings: Figures 1, 2A, 2B, 2C, 2D, 2E and 3 as originally filed.