T 1022/00 (Brazing filler/TOSHIBA) of 18.11.2003

Summary of Facts and Submissions

I. European patent application No. 94 115 966.7 was refused in a decision of the examining division dated 21 June 2000. The ground for the refusal was that the application did not meet the requirement of inventive step having regard to the prior art documents

D1: US-A-3 829 598;

D2: GB-A-2 084 796; and

D5: JP-A-2 064 070.

II. The appellant (applicant) lodged an appeal on 17 August 2000, paying the appeal fee the same day. A statement of the grounds of appeal was filed on 6 October 2000 together with an amended set of claims.

III. In a communication of the Board accompanying summons to oral proceedings, the Board informed the appellant that it was of the provisional opinion that the requirements of Articles 83 and 56 EPC were not met.

IV. In response to the above communication of the Board, the appellant submitted with the letter dated 16 October 2003 the following prior art documents in order to overcome the objection raised under Article 83 EPC:

D7: JP-A-5 213 677;

D8: JP-A-5 041 274; and

D9: JP-A-4 167 971.

V. In a telephone consultation between the rapporteur and the representative on 3 November 2003, the appellant's attention was drawn to translations in English provided by the Japanese Patent Office of documents D7 and D8.

VI. At the oral proceedings held on 18 November 2003, the appellant requested that the decision under appeal be set aside and a patent be granted on the basis of the following documents:

Claims:

1. to 14 filed on 6 October 2000 together with the statement of the grounds of appeal;

Description:

pages 1 to 3 and 6 to 12 as originally filed,

pages 4, 4a, 5 and 13 filed on 11 February 2000,

page 4b filed on 6 October 2000 together with the statement of the grounds of appeal;

Drawings:

Figures 1A to 5B as originally filed.

VII. Independent claims 1 and 9 of the above request have the following wording:

"1. Semiconductor device comprising:

a substrate (31) made of an electrically insulative material;

a metallic pattern member (32) provided on one major surface of said substrate;

a semiconductor element (36) mounted on said metallic pattern member;

a metallic layer (34) provided on another major surface of said substrate;

a heat dissipation plate (40) fixed onto said metallic layer;

a mold body (39) coating both said substrate mounted with said semiconductor element (36) and said head dissipation plate (40);

said metallic pattern member (32) has an external terminal portion extending from said substrate (31) substantially parallel with said one major surface of said substrate (31); and

the mold body (39) exposes the external terminal portion (32b);

characterized in that

said substrate (31) is made of aluminium nitride;

said substrate (31) is fixed onto the metallic pattern member (32) by using a brazing filler containing an element of the side group IV of the periodic table; and

said metallic pattern member (32) is made of copper."

"9. Method for manufacturing a semiconductor device comprising the steps of:

mounting a semiconductor element (36) on a metallic pattern member (32) provided on one major surface of a substrate (31), said substrate having a metallic layer (34) on another major surface of said substrate;

fixing a heat dissipation plate (40) onto said metallic layer;

coating both said substrate (31) mounted with said semiconductor element (36) and said heat dissipation plate (40) with an insulative material;

the pattern member (32) is configured to have an external terminal portion (32b) extending from said substrate (31) substantially parallel with said one major surface of said substrate (31); and

the step of coating is performed so as to expose the external terminal portion (32b);

characterized in that

said substrate (31) is made of aluminium nitride;

said substrate (31) is fixed onto the metallic pattern member (32) by using a brazing filler containing an element of the side group IV of the periodic table; and

said metallic pattern member (32) is made of copper."

VIII. In support of his request, the appellant presented essentially the following arguments:

(a) The application in suit is concerned with providing a semiconductor device mounting a power transistor, power integrated circuit or the like which is cheap but has a high thermal conduction.

(b) The claimed device requires less production steps than prior art devices, and therefore production cost is reduced. In particular, the use of a brazing filler containing an element of the side group IV of the periodic table does not require a prior step of metal plating the substrate. Furthermore, the use of AlN and copper for the substrate and metallic layers, respectively, improves the thermal conductance of the device.

(c) Document D2 neither contains any hints to select AlN for the substrate nor to bond metal layers on both sides of the substrate with a brazing filler containing an element of the side group IV of the periodic table.

(d) Although document D8 discloses copper layer brazed to an AlN substrate, there is no hint therein to use this structure for the device of document D2. In particular, a skilled person seeking to reduce the cost with respect to the device of document D2 would not consider document D8 at all.

Reasons for the Decision

1. The appeal complies with Articles 106 to 108 and Rule 64 EPC and is therefore admissible.

2. Inventive step

2.1. It is not in dispute that document D2 represents the closest prior art. It discloses a semiconductor device for mounting a power semiconductor element comprising a substrate 28A made of e.g. alumina (cf. Figure 23; page 6, lines 13 to 43; the sentence bridging pages 3 and 4). A metallic pattern member 31 and a metal layer 32 are provided on opposite major surfaces of the substrate. The semiconductor element 6 is mounted on the metallic pattern member 31 and a heat dissipation plate (heat sink) 3 is fixed to the metal layer 32. A mold body 10 made of an insulating material is provided coating the substrate and the heat dissipation plate in such a manner that an external terminal portion 19 of the metallic pattern member remains exposed.

2.2. The device according to claim 1 differs from that of document D2 in that (i) the substrate is made of AlN; (ii) the metallic pattern is fixed onto the substrate using a brazing filler containing an element of the side group IV of the periodic table, i.e. one of Ti, Zr, and Hf; and (iii) the metallic pattern member is made of copper, whereas in document D2, the material of the metallic pattern member 31 and the metal layer 32 is not specified.

2.3. The technical effect of the distinguishing features (i) and (iii) is that heat produced in the semiconductor element can be dissipated more efficiently than in the device known from document D2, since AlN has higher thermal conductivity than alumina, and copper is well-known to be an excellent thermal and electrical conductor. The remaining distinguishing feature (ii) is a consequence of using AlN for the substrate, since other conventional means for mounting the metallization onto the substrate do not work for substrates made of AlN (cf. application in suit, column 9, lines 11 to 14).

2.3.1. According to the appellant, the technical problem addressed by the application in suit relates to providing a semiconductor device which has improved heat dissipation than the prior art devices and which is cheaper to produce (cf. item VIII(a) above; application as published, column 2, lines 36 to 41, column 3, lines 8 to 13 and 32 to 35).

2.3.2. The Board notes however that the problem of reducing the cost is formulated in view of the prior art cited in the application in suit (cf. Figures 1 and 2; column 2). According to the application in suit, the cost reduction is attained by having a structure which has less structural components and therefore requires less manufacturing steps than the prior art devices depicted in Figures 1 and 2 (cf. column 8, line 33 to column 9, line 7). This statement, however, is in connection with examples in the application in suit where a substrate of alumina having the copper pattern member and copper layer directly bonded to the alumina substrate, i.e. a structure corresponding to that of document D2.

For the embodiment of the claimed invention having a substrate made of AlN, the application in suit discloses that this alternative is more expensive than that employing an alumina substrate, since AlN is a more expensive material than alumina, and a direct bonding technique cannot be used for fixing the copper pattern member and copper layer to the substrate (cf. column 9, lines 8 to 23).

Incidentally, document D2 which refers to similar prior art as that of the application in suit, discloses that the device depicted in Figure 23 requires less assembling steps than the older devices, thereby reducing costs (cf. D2, page 6, lines 28 to 34).

2.3.3. Therefore, when the closest prior art document D2 is taken into account, the objective technical problem addressed by the application in suit cannot be regarded as reduction of costs but improving the heat dissipation of the known semiconductor device.

2.4. Document D8 discloses a substrate 2 made of AlN having a pattern member 1 and a metallic layer 1 on the respective major surfaces of the substrate (cf. Figure 1; abstract). Both the pattern member and the metallic layer are made of copper and are brazed to the substrate using a brazing filler 3 made of a Ti:Ag:Cu alloy. The substrate is intended to be used for mounting integrated circuits chips, power diodes, etc. (cf. translation, paragraph [0001]). Since AlN has high thermal conductivity, substrates made of AlN are considered suitable for semiconductor elements which produce large amounts of heat (cf. paragraph [0002]).

2.5. A skilled person seeking to improve the heat dissipation of the device of document D2 would thus consider the teaching of document D8, since contrary to the appellant's arguments (cf. item VIII(d) above), it relates to the same type of ceramic substrate as in the device of document D2 having a metallic pattern member and a metallic layer on the respective major surfaces of the substrate, and it addresses the issue of improving the thermal conduction through the substrate (cf. D8, paragraph [0002]).

Since document D8 discloses all the distinguishing features (i) to (iii) of claim 1 (cf. item 2.2 above), a straight-forward application of the teaching of document D8 to the device of document D2 would lead to the device according to claim 1.

2.6. The Board is unable to follow the appellant's argument that a skilled person seeking to reduce the cost of the device of document D2 would not consider document D8 at all (cf. item VIII(d) above), since, as stated under item 2.3.3 above, the technical problem to be solved having regard to document D2 relates to improving the heat dissipation rather than reducing the cost. Since document D8 teaches to improve the thermal conductance of the insulating substrate in a semiconductor device by replacing alumina with AlN, the skilled person would consider document D8 to be highly relevant for improving the thermal dissipation of the device of document D2.

2.7. For the above reasons, in the Board's judgement, the subject matter of claim 1 does not involve an inventive step within the meaning of Article 56 EPC. The application therefore does not meet the requirements of Article 52(1) EPC.

ORDER

For these reasons it is decided that:

The appeal is dismissed.