T 0730/00 () of 19.5.2003

Summary of Facts and Submissions

I. European patent application No. 98 307 928.6 was refused by the decision of the Examining Division of 27. January 2000. The ground for the refusal was that the subject-matters of claims 1 to 5 did not involve an inventive step having regard to prior art documents:

D1: Electrochemical Society Proceedings, 1996, pages 36 to 48, being the closest state of the art, and

D2: US-A-5 382 822.

II. The appellant (applicant) lodged an appeal on 2 March 2000, paying the appeal fee the same day. The statement setting out the grounds of appeal was filed on 3 June 2000.

III. Amendments to the claims and the description were filed by the appellant with the letter dated 4 April 2003 in response to a communication from the Board.

IV. The appellant requests that the decision under appeal be set aside and that a patent be granted on the basis of the following patent application documents:

Claims: 1 to 5, filed with the letter of 4 April 2003

Description: pages 1 and 5 to 7, as originally filed pages 2 to 4, filed with the letter of 4. April 2003

Drawings: Sheets 1/3 to 3/3, as originally filed.

The wording of the independent claims 1 and 5 are as follows:

"1. An article comprising a metal-oxide-semiconductor (MOS) device that comprises an oxide layer on a major surface of a semiconductor body;

characterized in that

the semiconductor body is a single crystal GaN body, and the oxide layer is a high quality Ga-Gd-oxide layer, selected such that the MOS device exhibits charge depletion under an applied voltage of a first polarity, and exhibits charge accumulation under an applied voltage of a second polarity."

"5. Method of making an article comprising a metal-oxide-semiconductor (MOS) device that comprises an oxide layer on a major surface of a semiconductor body;

characterized in that

a) providing a semiconductor body that is a single crystal GaN body;

b) preparing the major surface of the semiconductor body such that at least a relevant portion of the surface is substantially atomically clean and substantially atomically ordered and

c) forming the oxide layer on the major surface of the GaN body by exposing the major surface an evaporant from a Ga5Gd3O12 evaporation source such that a first monolayer of the oxide is formed before a 1% surface coverage with impurity atoms is reached."

V. In the decision under appeal the Examining Division argued that document D1, representing the closest state of the art, discloses a method to form a Ga-Gd-oxide layer on a GaAs body from which the article according to claim 1 differs only in that the GaAs body is replaced by a GaN body. The problem to be solved was thus seen in providing a power device based on a high bandgap material having good breakdown characteristics. However, GaN based devices are well known in the art (cf. document D2). The skilled person had therefore a clear incentive to try the Ga-Gd-oxide system disclosed in document D1 also for GaN-based devices. Even though the III-V materials GaAs and GaN have different physical properties the skilled person had not to overcome a technical prejudice to apply the teachings of document D1 also to the GaN system.

VI. The arguments of the appellant in favour of inventive step can be summarized as follows:

- In a 1977 review article (C. W. Wilmsen et al., Thin Solid Films, 1977, Vol. 46, pages 17 to 45) the failure of finding a suitable insulator for a GaAs-based metal-oxide-semiconductor (MOS) field-effect-transistor (MOSFET) device is reported.

- Nearly twenty years lapsed before a suitable oxide/GaAs system with device-grade properties was found: document D1, published in 1996, discloses that, in sharp contrast to the results obtained with Ga-Gd-oxide, the interface properties of Al2O3/GaAs, MgO/GaAs and SiO2/GaAs systems are intrinsically pinned at midgap and are, therefore, useless for device purposes. The results of document D1 clearly demonstrate the specificity of the process of fabricating device-grade GaAs MOS structures.

- In view of the specificity with regard to the composition of the oxide on GaAs, there is no reason for assuming that Ga-Gd-oxide deposited on a III-V semiconductor other than GaAs would yield a device-grade structure. GaAs and GaN do not only have different lattice symmetry (cubic vs. hexagonal) but also differ with regard to bonding (4% ionic vs. 39% ionic). In view of the pronounced physical differences between GaAs and GaN and the known specificity of GaAs-based MOS structures with regard to the composition of the oxide, it would be a completely unwarranted expectation to assume that Ga-Gd-oxide would yield a device-grade structure in a GaN-based MOS device.

Reasons for the Decision

1. The appeal is admissible.

2. Amendments

In the decision under appeal, there were no objections raised against the claims under Article 123(2) EPC, and the Board is also satisfied that the claims as amended during the examination proceedings complied with Article 123(2) EPC.

In the course of the appeal proceedings the independent method claim 5 has been amended by the addition of features as in (b) and (c). These features are disclosed in the application as originally filed (cf. column 2, lines 44 to 49 and column 3, lines 29 to 38 of the published application).

The Board is, therefore, satisfied that the amendments made fulfill the requirement of Article 123(2) EPC.

3. Clarity (Article 84 EPC)

The expressions "substantially atomically clean" and "substantially atomically ordered" used in claim 5 are defined in the description of the application in suit (cf. column 2, lines 1 to 23 of the published application).

The expression "high quality" Ga-Gd-oxide layer is clear in the context and means that the quality of the Ga-Gd-oxide layer is such that it enables charge depletion and charge accumulation as specified in the claim.

For these reasons, in the Board's view, the scope of the claims is clearly defined.

4. Inventive step (Article 56 EPC)

The only remaining issue in this appeal is that of inventive step.

4.1. Document D1 discloses the properties of several oxide-GaAs single crystal heterostructures. According to this document, a low interface state density is required inter alia for metal-insulator-semiconductor field effect transistors (MOSFETs), but the fabrication of such structures with thermodynamical and photochemical stability has remained one of the key challenges in compound semiconductors during the last three decades (cf. D1, page 37, 2nd paragraph). A unique low interfacial state density has been attained in Ga2O3(Gd2O3)-GaAs heterostructures. In contrast thereto, the results obtained in Al2O3-, SiO2- and MgO-GaAs interfaces are intrinsically pinned at midgap (cf. page 37, 4th paragraph; page 41, 3rd paragraph and page 47, "Conclusions").

4.2. The application in suit, on the other hand, discloses a metal-oxide-semiconductor (MOS) device comprising in the order specified, a dielectric substrate 11, a GaN single crystal layer 12, a Ga-Gd-oxide layer 13 and a metal electrode 14 (cf. Figure 1). GaN is a high bandgap semiconductor having excellent breakdown and transport properties which make it very useful for power electronic devices (cf. column 1, lines 23 to 29 of the published application). However, it has not previously been possible to grow a high quality oxide on GaN that permits modulation of the semiconductor's surface charge by variation of the applied voltage (cf. ibid, column 1, lines 39 to 40 and 48 to 51).

4.3. The article according to claim 1, therefore, differs from the device disclosed in document D1 in that a high bandgap semiconductor, ie a GaN single crystal, is employed.

The Board concurs with the Examining Division in that the problem addressed by the application is the provision of a power device based on GaN, a high bandgap material, having good breakdown characteristics.

4.4. In the decision under appeal the Examining Division argued that although the III-V materials GaAs and GaN have different physical properties the skilled person had no technical prejudice to overcome to apply the teachings of document D1, ie the use of a Ga-Gd-oxide as insulating layer, to a GaN-based MOS structure known eg from document D2. For this reason, it concluded that the device according to claim 1 and the fabrication method according to claim 5 did not involve an inventive step.

4.5. The Boards of Appeal have recognized eg in decisions T 119/82 (OJ 1984, 217) and T 48/86 that a well established technical prejudice in the state of the art against the teaching of the invention can be regarded as an indication of the presence of inventive step. However, in the present Board's view, the contrary situation, ie the absence of a technical prejudice, cannot be, as a rule, taken as an indication of the absence of inventive step. In the present case, an absence of a technical prejudice, therefore, cannot be the sole reason for denying the presence of an inventive step. According to Article 56 EPC an invention shall be considered as involving an inventive step if, having regard to the state of the art, it is not obvious to a person skilled in the art. Consequently, an invention must be obvious in view of the state of the art to be considered non inventive.

The Examining Division has not shown that the use of a Ga-Gd-oxide in a GaN-based MOS structure was obvious in view of the state of the art and, in particular, of document D1. The Board concurs with the appellant in that, due to the different lattice symmetry (cubic vs. hexagonal) and the nature of bonding (4% ionic vs. 39% ionic) of GaAs and GaN and due to the specificity of the material of the oxide layer for a device-grade GaAs-based MOS structure there are no reasons to expect a priori that a Ga-Gd-oxide would provide a low interfacial state density which would yield a useful a GaN-based MOS device.

4.6. No further insight is gained, moreover, from the disclosure of document D2, since this document merely suggests the use of a layer of diamond for forming an insulating layer between the gate electrode and the semiconductor body such as GaN in a MISFET device (cf. column 2, lines 12 to 29).

4.7. For these reasons, in the Board's judgement, the subject-matter of claim 1 involves an inventive step in the sense of Article 56 EPC and accordingly meets the requirements of Article 52(1) EPC.

The above reasoning is also applicable to independent claim 5 relating to a method producing a MOS device having a Ga-Gd-oxide layer on a GaN semiconductor.

ORDER

For these reasons it is decided that:

1. The decision under appeal is set aside.

2. The case is remitted to the first instance with the order to grant a patent in the following version:

Claims: 1 to 5, filed with the letter of 4 April 2003

Description: pages 1 and 5 to 7, as originally filed pages 2 to 4, filed with the letter of 4. April 2003

Drawings: Sheets 1/3 to 3/3, as originally filed.